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Leonel Sousa has been a Full Professor at Instituto Superior Técnico (IST), Universidade de Lisboa since 2010. He obtained his PhD in Electrical and Computer Engineering (ECE) from IST in 1996 and his Habilitation degree (Agregação) in the same area in 2004, also at IST. He has been a senior researcher at INESC-ID since 1998. His research interests include computer architectures, accelerators, and parallel and heterogeneous systems. Leonel Sousa has served in several leadership positions, including Director of the Electrical and Computer Engineering BSc and MSc programs at IST (2008-2013), Vice-Chair of the Scientific Council of IST, with the responsibility for Research and PhD Programs (2013-2016), Chair of the Board of Directors of INESC-ID (2009-2013), Head of the ECE Department of IST (2017-2020), and currently Director of INESC (holding) since 2021. He has spent sabbatical periods as a visiting professor at the Technical University of Delft in Netherlands (2003), at CMU in the US (2016), and at the University of Tsukuba in Japan (2016). He is a Fellow of the IET, a Distinguished Scientist of the ACM, and a Distinguished Contributor to the IEEE Computer Society. During the period under evaluation, Leonel Sousa has received awards for the quality of his work: the Best INESC-ID Senior Researcher in 2021; the Scientific Award University of Lisbon/Caixa Geral de Depósitos, in the area of Electrical and Computer Engineering, for the impact of his publications in 2021; and the Award for Editorial Service and Excellence for the role as AE from IEEE Transactions on Computers (2020).
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Identification

Personal identification

Full name
Leonel Augusto Pires Seabra de Sousa

Citation names

  • Sousa, Leonel

Author identifiers

Ciência ID
1212-9D42-1510
ORCID iD
0000-0002-8066-221X

Languages

Language Speaking Reading Writing Listening Peer-review
French Beginner (A1) Intermediate (B1) Beginner (A1) Beginner (A1)
English Advanced (C1) Advanced (C1) Intermediate (B1) Advanced (C1)
Education
Degree Classification
2004
Concluded
 Habilitation (Título de Agregado)
Universidade de Lisboa Instituto Superior Técnico, Portugal
 unanimously approved
1996
Concluded
 Doutoramento em Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Processadores Paralelos de Imagem com Acesso Ortogonal a Memória Partilhada" (THESIS/DISSERTATION)
 unanimously approved
Affiliation

Science

Category
Host institution 		Employer
1987/01/01 - Current Researcher (Research) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Teaching in Higher Education

Category
Host institution 		Employer
2010/12/28 - Current Full Professor (University Teacher) Universidade de Lisboa Instituto Superior Técnico, Portugal

Positions / Appointments

Category
Host institution 		Employer
2018/01/01 - 2019/12/31 President Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Others

Category
Host institution 		Employer
2016/09/10 - 2016/12/10 Visiting Professor of the Electrical and Computer Engineering Department at Carnegie Mellon University Carnegie Mellon University, United States
2016/06/12 - 2016/08/10 JSPS Invitation Fellowship for Research in Japan and Visiting Professor of the Computer Science Departmente at the University of Tsukuba, Japan Tsukuba Daigaku, Japan
2006/09/25 - 2010/12/27 Associate Professor with "Agregação" of the Dept . of Electrical and Computer Engineering Universidade de Lisboa Instituto Superior Técnico, Portugal
2004/12/16 - 2006/09/24 Assistant Professor with "Agregação" of the Dept . of Electrical and Computer Engineering Universidade de Lisboa Instituto Superior Técnico, Portugal
1996/06/14 - 2004/12/15 Assistant Professor of the Dept . of Electrical and Computer Engineering Universidade de Lisboa Instituto Superior Técnico, Portugal
1992/03/15 - 1996/06/14 Teaching Assistant of the Dept . of Electrical and Computer Engineering Universidade de Lisboa Instituto Superior Técnico, Portugal
Projects

Grant

Designation Funders
2012/03 - 2015/08 THREadS: Multitask System Framework with Transparent Hardware Reconfiguration
grant.Provided by PTCRIS: 117329
 Fundação para a Ciência e a Tecnologia

Contract

Designation Funders
2023/03/10 - 2026/03/09 Compilação e Adaptação de Hardware para a Unificação da Computação Especializada e de Uso Geral
2022.06780.PTDC
10.54499/2022.06780.PTDC
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto de Telecomunicações Lisboa, Portugal

Instituto de Engenharia de Sistemas e Computadores Tecnologia e Ciência, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2021/04/01 - 2024/03/31 An Optimization and Co-design Framework for Sparse Computation (SparCity)
Grant agreement ID: 956213
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 European Union
Ongoing
2018/06/01 - 2021/12/31 Processamento de Elevado Desempenho e Energeticamente Eficiente para Aplicações de Bioinformática nos Sistemas Heterogéneos Emergentes
PTDC/CCI-COM/31901/2017
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2018/01 - 2020/12 TPM: Future Proofing the Connected World: A Quantum-Resistant Trusted Platform Module
779391
 European Commission
2014/03 - 2018/03 Network for Sustainable Ultrascale Computing (NESUS)
IC1305
Researcher
European Commission
2016/01 - 2018/02 HiPEAC-High Performance and Embedded Architecture and Compilation
687698
Researcher
European Commission
Ongoing
2013/05/01 - 2015/12/31 Transpondo os Limites do Processamento Paralelo em Sistemas Computacionais Heterogéneos
PTDC/EEI-ELC/3152/2012
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2013/05 - 2015/12 Stretching the Limits of Parallel Processing on Heterogenous Computing Systems
grant.Provided by PTCRIS: 129304
Principal investigator
Fundação para a Ciência e a Tecnologia
2012/03/01 - 2015/08/31 THREadS: Framework para Sistemas Multi-Tarefa com Reconfiguração Transparente de Hardware
PTDC/EEA-ELC/117329/2010
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2012/03 - 2015/08 THREadS: Multitask System Framework with Transparent Hardware Reconfiguration
grant.Provided by PTCRIS: 109367
Researcher
Fundação para a Ciência e a Tecnologia
2014/03/01 - 2015/07/31 Infraestrutura automática para computação baseada em RNS
EXPL/EEI-ELC/1572/2013
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2014/03 - 2015/07 Framework for Automatic RNS-Based Computation
grant.Provided by PTCRIS: 134597
Principal investigator
Fundação para a Ciência e a Tecnologia
2013/07/01 - 2014/09/30 Uma plataforma de elevado débito para biodetecção magnetoresistiva
EXPL/EEI-ELC/1029/2012
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

INESC Microsistemas e Nanotecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2013/07 - 2014/09 A high throughput magnetoresistive biodetection platform
grant.Provided by PTCRIS: 128671
Researcher
Fundação para a Ciência e a Tecnologia
2011/03 - 2014/02 NEUROCLINOMICS - Understanding NEUROdegenerative diseases throught CLINical and OMICS data integration
grant.Provided by PTCRIS: 111239
Researcher
Fundação para a Ciência e a Tecnologia
2011/01/01 - 2013/12/31 HELIX: Arquitectura heterogénea com múltiplos núcleos para análise de sequências biológicas
PTDC/EEA-ELC/113999/2009
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2011/01 - 2013/12 HELIX: Heterogeneous Multi-Core Architecture for Biological Sequence Analysis
grant.Provided by PTCRIS: 113999
Researcher
Fundação para a Ciência e a Tecnologia
2010/01/01 - 2012/12/31 BIOMAGCMOSPLAT - Novo Biochip CMOS Magnético e Novo Sistema de Leitura de Alto Desempenho
PTDC/EEA-ELC/108555/2008
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

INESC Microsistemas e Nanotecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2010/01 - 2012/12 BIOMAGCMOSPLAT - New Magnetic CMOS Biochip and New High Performance Reading Platform
grant.Provided by PTCRIS: 108555
Researcher
Fundação para a Ciência e a Tecnologia
2009/01/01 - 2012/03/31 Nanoelectrónica para aplicações na indústria automovel (SE2A)
ENIAC/NTec/0002/2008
INESC Microsistemas e Nanotecnologias, Portugal

Instituto de Engenharia de Sistemas e Computadores Inovação, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2009/01 - 2012/03 Nanoelectronics for Safe, Fuel Efficient and Environment Friendly Automotive Solutions (SE2A)
grant.Provided by PTCRIS: 109580
Researcher
Fundação para a Ciência e a Tecnologia
2007/09/01 - 2010/12/31 ICONS- Estimulador Neuronal Intra Cortex Visual
PTDC/EEA-ELC/68972/2006
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

INESC Microsistemas e Nanotecnologias, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2007/07/10 - 2010/12/31 IDeA - Projecto INtegrado para Automação em Anestesia
PTDC/EEA-ACR/69288/2006
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Centro Hospitalar Universitário de Santo António, Portugal

Hospital Geral de Santo António SA, Portugal

Universidade de Trás-os-Montes e Alto Douro, Portugal

Universidade do Porto Faculdade de Ciências, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2007/09 - 2010/12 ICONS- Intracortical Neuronal Stimulator
grant.Provided by PTCRIS: 68972
Researcher
Fundação para a Ciência e a Tecnologia
2007/07 - 2010/12 IDeA - Integrated Design for Automation of Anaesthesia
grant.Provided by PTCRIS: 69288
Researcher
Fundação para a Ciência e a Tecnologia
2005/01/01 - 2008/11/30 AMEP: Processador Adaptativo para Estimação de Movimento em Dispositivos Autónomos baseados na Norma H.264/AVC
POSC/EEA-CPS/60765/2004
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2005/01/01 - 2008/11/30 Resposta Neuronal da Retina: Modelização Precisa para Sistemas de Visão Artificial
POSC/EEA-CPS/61779/2004
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2005/01 - 2008/11 Retina Neural Code: Accurate Modelling towards an Artificial Visual System
grant.Provided by PTCRIS: 61779
Principal investigator
Fundação para a Ciência e a Tecnologia
2005/01 - 2008/11 AMEP: Adaptive H.264/AVC Motion Estimation Processor for Mobile and Battery Supplied Devices
grant.Provided by PTCRIS: 60765
Principal investigator
Fundação para a Ciência e a Tecnologia
2005/01/01 - 2006/12/31 Biochips Magnetoresistivos para reconhecimento biomolecular
POSC/EEA-ESE/58523/2004
INESC Microsistemas e Nanotecnologias, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Fundação para a Ciência e a Tecnologia
Concluded
2005/01 - 2006/12 Magnetoresistive Biochip Microarray Platform for Biomolecular Recognition
grant.Provided by PTCRIS: 58523
Researcher
Fundação para a Ciência e a Tecnologia
Outputs

Publications

Book
  1. Nobre, R.; Santander-Jiménez, S.; Sousa, L.; Ilic, A.. Accelerating 3-Way Epistasis Detection with CPU+GPU Processing. 2020.
    10.1007/978-3-030-63171-0_6
  2. Campos, R.; Marques, D.; Santander-Jiménez, S.; Sousa, L.; Ilic, A.. Heterogeneous CPU+iGPU processing for efficient epistasis detection. 2020.
    10.1007/978-3-030-57675-2_38
  3. EL Kassem, N.; Fiolhais, L.; Martins, P.; Chen, L.; Sousa, L.. A Lattice-Based Enhanced Privacy ID. 2020.
    10.1007/978-3-030-41702-4_2
  4. Santander-Jiménez, S.; Vega-Rodríguez, M.A.; Sousa, L.. Analysis of MOEA/D Approaches for Inferring Ancestral Relationships. 2019.
    10.1007/978-3-030-29859-3_15
  5. Denoyelle, N.; Goglin, B.; Ilic, A.; Jeannot, E.; Sousa, L.. Modeling large compute nodes with heterogeneous memories with cache-aware roofline model. 2018.
    10.1007/978-3-319-72971-8_5
  6. Serrano, E.; Ilic, A.; Sousa, L.; Garcia-Blas, J.; Carretero, J.. Cache-Aware Roofline Model and Medical Image Processing Optimizations in GPUs. 2018.
    10.1007/978-3-030-02465-9_36
  7. Bajard, J.-C.; Eynard, J.; Hasan, A.; Martins, P.; Sousa, L.; Zucca, V.. Efficient reductions in cyclotomic rings - application to ring-LWE based FHE schemes. 2018.
    10.1007/978-3-319-72565-9_8
  8. Martins, P.; Sousa, L.. Enhancing data parallelism of fully homomorphic encryption. 2017.
    10.1007/978-3-319-53177-9_10
  9. Martins, P.; Sousa, L.. Hpc on the intel xeon phi: Homomorphic word searching. 2017.
    10.1007/978-3-319-61982-8_9
  10. Roma, N.; Rodrigues, A.; Sousa, L.. Parallel Programming Framework for H.264/AVC Video Encoding in Multicore Systems. 2017.
    10.1002/9781119332015.ch14
  11. Yamagiwa, S.; Falcao, G.; Wada, K.; Sousa, L.. Stream-based parallel computing methodology and development environment for high performance manycore accelerators. 2015.
  12. Antão, D.; Taniça, L.; Ilic, A.; Pratas, F.; Tomás, P.; Sousa, L.. Monitoring performance and power for application characterization with the cache-aware roofline model. 2014.
    10.1007/978-3-642-55224-3_70
  13. Taniça, L.; Ilic, A.; Tomás, P.; Sousa, L.. Schedmon: A performance and energy monitoring tool for modern multi-cores. 2014.
  14. Kuan, L.; Tomás, P.; Sousa, L.. Finite-difference in time-domain scalable implementations on CUDA and openCL. 2014.
    10.1007/978-3-319-06548-9_11
  15. Clarke, D.; Ilic, A.; Lastovetsky, A.; Rychkov, V.; Sousa, L.; Zhong, Z.. Design and Optimization of Scientific Applications for Highly Heterogeneous and Hierarchical HPC Platforms Using Functional Computation Performance Models. 2014.
    10.1002/9781118711897.ch13
  16. Ilic, A.; Sousa, L.. Efficient Multilevel Load Balancing on Heterogeneous CPU + GPU Systems. 2014.
    10.1002/9781118711897.ch14
  17. Ilic, A.; Pratas, F.; Trancoso, P.; Sousa, L.. High-performance computing on heterogeneous systems: Database queries on cpu and gpu. 2011.
    10.3233/978-1-60750-803-8-202
  18. Roma, N.; Dias, T.; Sousa, L.. Customizable and reduced hardware motion estimation processors. 2005.
    10.1007/1-4020-3128-9_5
  19. Sousa, L.; Tomás, P.; Pelayo, F.; Martinez, A.; Morillas, C.A.; Romero, S.. Bioinspired stimulus encoder for cortical visual neuroprostheses. 2005.
    10.1007/1-4020-3128-9_22
  20. Sinnen, O.; Sousa, L.. Scheduling task graphs on arbitrary processor architectures considering contention. 2001.
  21. Sinnen, O.; Sousa, L.. Exploiting unused time slots in list scheduling considering communication contention. 2001.
  22. Sousa, L.; Sinnen, O.. Synchronous non-local image processing on orthogonal multiprocessor systems. 2001.
  23. Sinnen, O.; Sousa, L.. A platform independent parallelising tool based on graph theoretic models. 2001.
Conference paper
  1. Cavallaro, J.R.; Falcao, G.; Sousa, L.; Sheikh, F.. "Message from the SiPS 2020 Conference Chairs". 2020.
    10.1109/SiPS50750.2020.9195187
  2. Nobre, R.; Ilic, A.; Santander-Jimenez, S.; Sousa, L.. "Exploring the Binary Precision Capabilities of Tensor Cores for Epistasis Detection". 2020.
    10.1109/IPDPS47924.2020.00043
  3. Mentens, N.; Sousa, L.; Trancoso, P.. "Preface". 2020.
    10.1109/FPL50879.2020.00005
  4. Bajard, J.-C.; Eynard, J.; Martins, P.; Sousa, L.; Zucca, V.. "An asymptotically faster version of FV supported on HPR". 2020.
    10.1109/ARITH48897.2020.00020
  5. Martins, P.; Marrez, J.; Bajard, J.-C.; Sousa, L.. "HyPoRes: An Hybrid Representation System for ECC". 2019.
    10.1109/ARITH.2019.00049
  6. Rashidi, L.; Dalili-Yazdi, A.; Entezari-Maleki, R.; Sousa, L.; Movaghar, A.. "Scalable performance analysis of epidemic routing considering skewed location visiting preferences". 2019.
    10.1109/MASCOTS.2019.00029
  7. Gante, J.; Falcão, G.; Sousa, L.. "Enhancing Beamformed Fingerprint Outdoor Positioning with Hierarchical Convolutional Neural Networks". 2019.
    10.1109/ICASSP.2019.8683782
  8. Santander-Jiménez, S.; Vega-Rodríguez, M.A.; Sousa, L.. "Phylogenetic Reconstructions Using an Indicator-Based Bat Algorithm for Multicore Processors". 2019.
    10.1109/BIBM.2018.8621188
  9. Sanchez, G.; Agostini, L.; Sousa, L.; Marcon, C.. "3D-HEVC DMM-1 Parallelism Exploration Targeting Multicore Systems". 2018.
    10.1109/SBCCI.2018.8533252
  10. Vieira, A.; Pratas, F.; Sousa, L.; Ilic, A.. "Accelerating CNN computation: Quantisation tuning and network resizing". 2018.
    10.1145/3295816.3295820
  11. Gante, J.; Falciao, G.; Sousa, L.. "Data-Aided Fast Beamforming Selection for 5G". 2018.
    10.1109/ICASSP.2018.8461461
  12. Gante, J.; Falcao, G.; Sousa, L.. "Beamformed Fingerprint Learning for Accurate Millimeter Wave Positioning". 2018.
    10.1109/VTCFall.2018.8690987
  13. Santander-Jiménez, S.; Vega-Rodríguez, M.A.; Sousa, L.. "Analysis of scheduling policies in metaheuristics for evolutionary biology". 2018.
    10.1145/3235830.3235831
  14. Martins, P.; Sousa, L.. "A stochastic number representation for fully homomorphic cryptography". 2017.
    10.1109/SiPS.2017.8109973
  15. Marques, D.; Duarte, H.; Sousa, L.; Ilic, A.. "Analyzing performance of multi-cores and applications with cache-aware roofline model". 2017.
    10.1109/HPCS.2017.158
  16. Wang, B.; Alvarez-Mesa, M.; Chi, C.C.; Juurlink, B.; De Souza, D.F.; Ilic, A.; Roma, N.; Sousa, L.. "Efficient HEVC decoder for heterogeneous CPU with GPU systems". 2017.
    10.1109/MMSP.2016.7813353
  17. Marques, D.; Duarte, H.; Ilic, A.; Sousa, L.; Belenov, R.; Thierry, P.; Matveev, Z.A.. "Performance analysis with cache-aware roofline model in intel advisor". 2017.
    10.1109/HPCS.2017.150
  18. Wang, H.; Gante, J.; Zhang, M.; Falcao, G.; Sousa, L.; Sinnen, O.. "High-Level Designs of Complex FIR Filters on FPGAs for the SKA". 2017.
    10.1109/HPCC-SmartCity-DSS.2016.0115
  19. Pereira, D.; Ilic, A.; Sousa, L.. "On boosting energy-efficiency of heterogeneous embedded systems via game theory". 2017.
    10.1145/3029580.3029584
  20. Lopes, A.; Pratas, F.; Sousa, L.; Ilic, A.. "Exploring GPU performance, power and energy-efficiency bounds with Cache-Aware Roofline Modeling". 2017.
    10.1109/ISPASS.2017.7975297
  21. Chen, M.; Lei, Y.; Sousa, L.; Zhao, Y.. "Message from the Program Committee Chairs". 2017.
    10.1109/BigMM.2017.5
  22. Gentilal, M.; Martins, P.; Sousa, L.. "TrustZone-backed bitcoin wallet". 2017.
    10.1145/3031836.3031841
  23. De Souza, D.F.; Ilic, A.; Roma, N.; Sousa, L.. "GPU acceleration of the HEVC decoder inter prediction module". 2016.
    10.1109/GlobalSIP.2015.7418397
  24. Martins, P.; Sousa, L.; Chawan, P.. "Featuring Immediate Revocation in Mikey-Sakke (FIRM)". 2016.
    10.1109/ISM.2015.101
  25. Chen, M.; Sousa, L.; Tian, Y.. "Message from Program Committee Chairs". 2016.
    10.1109/ISM.2015.5
  26. Pettenghi, H.; Sousa, L.; Ambrose, J.A.. "Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion". 2016.
    10.1109/DCIS.2015.7388556
  27. Zarandi, A.A.E.; Molahosseini, A.S.; Sousa, L.; Hosseinzadeh, M.; Navi, K.. "Area-delay-power-aware adder placement method for RNS reverse converter design". 2016.
    10.1109/LASCAS.2016.7451050
  28. Momcilovic, S.; Roma, N.; Sousa, L.; Milentijevic, I.. "Run-Time Machine Learning for HEVC/H.265 Fast Partitioning Decision". 2016.
    10.1109/ISM.2015.70
  29. Gaspar, F.; Tanica, L.; Tomas, P.; Ilic, A.; Sousa, L.. "Attaining performance fairness in big.LITTLE systems". 2015.
  30. Dias, T.; Roma, N.; Sousa, L.. "High performance IP core for HEVC quantization". 2015.
    10.1109/ISCAS.2015.7169275
  31. Matutino, P.M.; Chaves, R.; Sousa, L.. "ROM-less RNS-to-binary converter moduli {22n-1, 22n + 1, 2n-3, 2n + 3}". 2015.
    10.1109/ISICIR.2014.7029521
  32. De Souza, D.F.; Ilic, A.; Roma, N.; Sousa, L.. "Towards GPU HEVC intra decoding: Seizing fine-grain parallelism". 2015.
    10.1109/ICME.2015.7177515
  33. Kuan, L.; Sousa, L.; Tomas, P.. "Accelerating Phylogenetic Inference on Heterogeneous OpenCL Platforms". 2015.
    10.1109/Trustcom.2015.635
  34. Martins, P.; Sousa, L.; Eynard, J.; Bajard, J.-C.. "Programmable RNS lattice-based parallel cryptographic decryption". 2015.
    10.1109/ASAP.2015.7245723
  35. De Souza, D.F.; Ilic, A.; Roma, N.; Sousa, L.. "HEVC in-loop filters GPU parallelization in embedded systems". 2015.
    10.1109/SAMOS.2015.7363667
  36. Pettenghi, H.; Sousa, L.. "RNS reverse converters based on the new Chinese Remainder Theorem i". 2015.
    10.1109/ISCAS.2015.7168762
  37. Martins, P.; Sousa, L.. "Stretching the limits of programmable embedded devices for public-key cryptography". 2015.
    10.1145/2694805.2694809
  38. De Souza, D.F.; Roma, N.; Sousa, L.. "Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs". 2014.
    10.1109/ICASSP.2014.6854552
  39. Andrade, J.; Pratas, F.; Falcao, G.; Silva, V.; Sousa, L.. "Combining flexibility with low power: Dataflow and wide-pipeline LDPC decoding engines in the Gbit/s era". 2014.
    10.1109/ASAP.2014.6868671
  40. De Souza, D.F.; Roma, N.; Sousa, L.. "Opencl parallelization of the HEVC de-quantization and inverse transform for heterogeneous platforms". 2014.
  41. Momcilovic, S.; Ilic, A.; Roma, N.; Sousa, L.. "Collaborative inter-prediction on CPU+GPU systems". 2014.
    10.1109/ICIP.2014.7025245
  42. Martins, J.C.; Caeiro, J.J.; Sousa, L.A.. "Nonlinear system identification using constellation based multiple model adaptive estimators". 2014.
  43. Gaspar, F.; Ilic, A.; Tomás, P.; Sousa, L.. "Performance-aware task management and frequency scaling in embedded systems". 2014.
    10.1109/SBAC-PAD.2014.14
  44. Martins, P.; Sousa, L.. "On the evaluation of multi-core systems with SIMD engines for public-key cryptography". 2014.
    10.1109/SBAC-PADW.2014.10
  45. Ilic, A.; Momcilovic, S.; Roma, N.; Sousa, L.. "FEVES: Framework for efficient parallel video encoding on heterogeneous systems". 2014.
    10.1109/ICPP.2014.11
  46. D'Huys, T.; Momcilovic, S.; Pratas, F.; Sousa, L.. "Reconfigurable data flow engine for HEVC motion estimation". 2014.
    10.1109/ICIP.2014.7025244
  47. Pettenghi, H.; Ambrose, J.A.; Chaves, R.; Sousa, L.. "Method for designing multi-channel RNS architectures to prevent power analysis SCA". 2014.
    10.1109/ISCAS.2014.6865614
  48. Falcao, G.; Andrade, J.; Silva, V.; Yamagiwa, S.; Sousa, L.. "Stressing the BER simulation of LDPC codes in the error floor region using GPU clusters". 2013.
  49. Dias, T.; Roma, N.; Sousa, L.. "High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs". 2013.
  50. Antao, S.; Sousa, L.. "An RNS-based architecture targeting hardware accelerators for modular arithmetic". 2013.
    10.1109/ICASSP.2013.6638120
  51. Pratas, F.; Andrade, J.; Falcao, G.; Silva, V.; Sousa, L.. "Open the Gates: Using High-level Synthesis towards programmable LDPC decoders on FPGAs". 2013.
    10.1109/GlobalSIP.2013.6737141
  52. Kuan, L.; Tomas, P.; Sousa, L.. "A comparison of computing architectures and parallelization frameworks based on a two-dimensional FDTD". 2013.
    10.1109/HPCSim.2013.6641436
  53. Mendoza, E.; Aular, J.; Sousa, L.. "Optimizing horizontal-well hydraulic-fracture spacing in the Eagle Ford formation, Texas". 2011.
  54. Sousa Jr., L.C.; Santos, E.S.R.; Ferreira, F.H.. "Geomechanical data acquisition and modeling applied to an offshore sandstone petroleum reservoir". 2010.
  55. Pereira, L.C.; Costa, A.M.; Sousa Jr., L.C.; Amaral, C.S.; Souza, A.L.S.; Falcão, F.O.L.; Portella, F.A.; et al. "Specialist program for injection pressure limits considering fault reactivation criteria". 2010.
  56. Mendes, R.A.; Costa, A.M.; Sousa Jr., L.C.; Pereira, L.C.; Oliveira, M.F.F.. "Risks and mitigation problems in a CO2 injection project for a petroleum onshore field in Brazil". 2010.
  57. Cardoso, F.A.; Germano, J.; Martins, V.C.; Cardoso, S.; Sousa, L.A.; Piedade, M.S.; Freitas, P.P.. "Integrated magnetoresistive platform for biomolecular recognition". 2009.
  58. Momcilovic, S.; Sousa, L.. "A parallel algorithm for advanced video motion estimation on multicore architectures". 2008.
    10.1109/CISIS.2008.86
  59. Yamagiwa, S.; Sousa, L.. "Design and implementation of a tool for modeling and programming deadlock free meta-pipeline applications". 2008.
    10.1109/IPDPS.2008.4536121
  60. Roma, N.; Sousa, L.. "Fully compressed-domain transcoder for PIP/PAP video composition". 2007.
  61. Costa, B.A.; Lemos, J.M.; Piedade, M.S.; Sousa, L.; Almeida, T.; Germano, J.; Freitas, P.; Ferreira, H.; Cardoso, F.. "Temperature modelling of a biochip for DNA analysis". 2006.
    10.1109/MED.2006.328787
  62. Chaves, R.; Sousa, L.. "RDSP: A RISC DSP based on residue number system". 2003.
  63. Salvado, J.; Sousa, L.. "Video coding by using the 3D zero-tree approach in the wavelet transform domain". 2002.
    10.1109/ICDSP.2002.1028183
  64. Sinnen, O.; Sousa, L.. "Comparison of contention aware list scheduling heuristics for cluster computing". 2001.
    10.1109/ICPPW.2001.951976
Journal article
  1. Leonel Sousa. "Nonconventional Computer Arithmetic Circuits, Systems and Applications". IEEE Circuits and Systems Magazine (2021): https://doi.org/10.1109/MCAS.2020.3027425.
    10.1109/MCAS.2020.3027425
  2. Joao Gante; Leonel Sousa; Gabriel Falcao. "Dethroning GPS: Low-Power Accurate 5G Positioning Systems Using Machine Learning". IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10 2 (2020): 240-252. https://doi.org/10.1109/JETCAS.2020.2991024.
    10.1109/JETCAS.2020.2991024
  3. Gustavo Sanchez; Ramon Fernandes; Rodrigo Cataldo; Luciano Agostini; Leonel Sousa; Cesar Marcon. "Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction". IEEE Design & Test 37 3 (2020): 15-21. https://doi.org/10.1109/MDAT.2019.2952342.
    10.1109/MDAT.2019.2952342
  4. Leonel Sousa; Rogerio Paludo; Paulo Martins; Hector Pettenghi. "Towards the Integration of Reverse Converters into the RNS Channels". IEEE Transactions on Computers 69 3 (2020): 342-348. https://doi.org/10.1109/TC.2019.2948335.
    10.1109/TC.2019.2948335
  5. João Gante; Gabriel Falcão; Leonel Sousa. "Deep Learning Architectures for Accurate Millimeter Wave Positioning in 5G". Neural Processing Letters 51 1 (2020): 487-514. https://doi.org/10.1007/s11063-019-10073-1.
    10.1007/s11063-019-10073-1
  6. Paulo Martins; Leonel Sousa. "The Role of Non-Positional Arithmetic on Efficient Emerging Cryptographic Algorithms". IEEE Access 8 (2020): 59533-59549. https://doi.org/10.1109/ACCESS.2020.2983020.
    10.1109/ACCESS.2020.2983020
  7. Jean-Claude Bajard; Paulo Martins; Leonel Sousa; Vincent Zucca. "Improving the Efficiency of SVM Classification With FHE". IEEE Transactions on Information Forensics and Security 15 (2020): 1709-1722. https://doi.org/10.1109/TIFS.2019.2946097.
    10.1109/TIFS.2019.2946097
  8. Sergio Santander-Jimenez; Miguel A. Vega-Rodriguez; Leonel Sousa. "Inter-Algorithm Multiobjective Cooperation for Phylogenetic Reconstruction on Amino Acid Data". IEEE Transactions on Cybernetics (2020): 1-15. https://doi.org/10.1109/TCYB.2020.2995464.
    10.1109/TCYB.2020.2995464
  9. Sanchez, G.; Agostini, L.; Sousa, L.; Marcon, C.. "Parallelism exploration for 3D high-efficiency video coding depth modeling mode one". Journal of Real-Time Image Processing 17 4 (2020): 787-797. http://www.scopus.com/inward/record.url?eid=2-s2.0-85053490710&partnerID=MN8TOARS.
    10.1007/s11554-018-0819-3
  10. Dario Baptista; Leonel Sousa; Fernando Morgado-Dias. "Raising the Abstraction Level of a Deep Learning Design on FPGAs". IEEE Access 8 (2020): 205148-205161. https://doi.org/10.1109/ACCESS.2020.3036975.
    10.1109/ACCESS.2020.3036975
  11. Marques, D.; Ilic, A.; Matveev, Z.A.; Sousa, L.. "Application-driven Cache-Aware Roofline Model". Future Generation Computer Systems 107 (2020): 257-273. http://www.scopus.com/inward/record.url?eid=2-s2.0-85079063804&partnerID=MN8TOARS.
    10.1016/j.future.2020.01.044
  12. Taheri, G.; Khonsari, A.; Entezari-Maleki, R.; Sousa, L.. "A hybrid algorithm for task scheduling on heterogeneous multiprocessor embedded systems". Applied Soft Computing Journal 91 (2020): http://www.scopus.com/inward/record.url?eid=2-s2.0-85080139069&partnerID=MN8TOARS.
    10.1016/j.asoc.2020.106202
  13. Taheri, G.; Khonsari, A.; Entezari-Maleki, R.; Sousa, L.. "Temperature-aware core management in MPSoCs: Modelling and evaluation using MRMs". IET Computers and Digital Techniques 14 1 (2020): 17-26. http://www.scopus.com/inward/record.url?eid=2-s2.0-85078083596&partnerID=MN8TOARS.
    10.1049/iet-cdt.2018.5131
  14. Santander-Jiménez, S.; Vega-Rodríguez, M.A.; Zahinos-Márquez, A.; Sousa, L.. "GPU acceleration of Fitch’s parsimony on protein data: from Kepler to Turing". Journal of Supercomputing 76 12 (2020): 9827-9853. http://www.scopus.com/inward/record.url?eid=2-s2.0-85081631419&partnerID=MN8TOARS.
    10.1007/s11227-020-03225-x
  15. Gonçalves, F.; Santander-Jiménez, S.; Sousa, L.; Granado-Criado, J.M.; Ilic, A.. "Parallel evolutionary computation for multiobjective gene interaction analysis". Journal of Computational Science 40 (2020): http://www.scopus.com/inward/record.url?eid=2-s2.0-85077078692&partnerID=MN8TOARS.
    10.1016/j.jocs.2019.101068
  16. Fereshteh Jafarzadehpour; Amir Sabbagh Molahosseini; Azadeh Alsadat Emrani Zarandi; Leonel Sousa. "Efficient Modular Adder Designs Based on Thermometer and One-Hot Coding". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 9 (2019): 2142-2155. https://doi.org/10.1109/TVLSI.2019.2919609.
    10.1109/TVLSI.2019.2919609
  17. Nicolas Denoyelle; Brice Goglin; Aleksandar Ilic; Emmanuel Jeannot; Leonel Sousa. "Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model". IEEE Transactions on Parallel and Distributed Systems 30 6 (2019): 1374-1389. https://doi.org/10.1109/TPDS.2018.2883056.
    10.1109/TPDS.2018.2883056
  18. Sergio Santander-Jiménez; Miguel A. Vega-Rodríguez; Leonel Sousa. "A multiobjective adaptive approach for the inference of evolutionary relationships in protein-based scenarios". Information Sciences 485 (2019): 281-300. https://doi.org/10.1016/j.ins.2019.02.020.
    10.1016/j.ins.2019.02.020
  19. Sergio Santander-Jiménez; Miguel A. Vega-Rodríguez; Jorge Vicente-Viola; Leonel Sousa. "Comparative assessment of GPGPU technologies to accelerate objective functions: A case study on parsimony". Journal of Parallel and Distributed Computing 126 (2019): 67-81. https://doi.org/10.1016/j.jpdc.2018.12.006.
    10.1016/j.jpdc.2018.12.006
  20. Jafarzadehpour, F.; Molahosseini, A.S.; Zarandi, A.A.E.; Sousa, L.. "New energy-efficient hybrid wide-operand adder architecture". IET Circuits, Devices and Systems 13 8 (2019): 1221-1231. http://www.scopus.com/inward/record.url?eid=2-s2.0-85075890051&partnerID=MN8TOARS.
    10.1049/iet-cds.2019.0084
  21. Hiasat, A.; Sousa, L.. "Sign Identifier for the Enhanced Three Moduli Set {2n + k, 2n - 1, 2n+ 1 - 1}". Journal of Signal Processing Systems 91 8 (2019): 953-961. http://www.scopus.com/inward/record.url?eid=2-s2.0-85059915977&partnerID=MN8TOARS.
    10.1007/s11265-018-1434-z
  22. El Kassem, N.; Chen, L.; El Bansarkhani, R.; El Kaafarani, A.; Camenisch, J.; Hough, P.; Martins, P.; Sousa, L.. "More efficient, provably-secure direct anonymous attestation from lattices". Future Generation Computer Systems 99 (2019): 425-458. http://www.scopus.com/inward/record.url?eid=2-s2.0-85065479160&partnerID=MN8TOARS.
    10.1016/j.future.2019.04.036
  23. Martins, P.; Sousa, L.. "A methodical FHE-based cloud computing model". Future Generation Computer Systems 95 (2019): 639-648. http://www.scopus.com/inward/record.url?eid=2-s2.0-85060906910&partnerID=MN8TOARS.
    10.1016/j.future.2019.01.046
  24. Hiasat, A.; Sousa, L.. "On the Design of RNS inter-modulo processing units for the arithmetic-friendly moduli sets {2n+k, 2n - 1, 2n+1 - 1}". Computer Journal 62 2 (2019): 292-300. http://www.scopus.com/inward/record.url?eid=2-s2.0-85062719073&partnerID=MN8TOARS.
    10.1093/comjnl/bxy119
  25. Dario Baptista; Sheikh Shanawaz Mostafa; Lucas Pereira; Leonel Sousa; Fernando Morgado Dias. "Implementation Strategy of Convolution Neural Networks on Field Programmable Gate Arrays for Appliance Classification Using the Voltage and Current (V-I) Trajectory". Energies (2018): http://www.mdpi.com/1996-1073/11/9/2460.
    10.3390/en11092460
  26. Wang, B.; de Souza, D.F.; Alvarez-Mesa, M.; Chi, C.C.; Juurlink, B.; Ilic, A.; Roma, N.; Sousa, L.. "Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU". Signal Processing: Image Communication 62 (2018): 93-105. http://www.scopus.com/inward/record.url?eid=2-s2.0-85040084925&partnerID=MN8TOARS.
    10.1016/j.image.2017.12.009
  27. Kuan, Lidia; Pratas, Frederico; Sousa, Leonel; Tomas, Pedro. "MrBayes sMC(3): Accelerating Bayesian inference of phylogenetic trees". International Journal of High Performance Computing Applications 32 2 (2018): 246-265. http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000425175300004&KeyUID=WOS:000425175300004.
    10.1177/1094342016652461
  28. Chen, M.; Lei, Y.; Sousa, L.; Zhao, Y.. "Guest editors' introduction". International Journal of Semantic Computing 12 2 (2018): 187-190. http://www.scopus.com/inward/record.url?eid=2-s2.0-85051563668&partnerID=MN8TOARS.
    10.1142/S1793351X18020026
  29. Martins, P.; Sousa, L.; Mariano, A.. "A survey on fully homomorphic encryption: An engineering perspective". ACM Computing Surveys 50 6 (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85040233317&partnerID=MN8TOARS.
    10.1145/3124441
  30. Martins, P.; Eynard, J.; Bajard, J.-C.; Sousa, L.. "Arithmetical improvement of the round-off for cryptosystems in high-dimensional lattices". IEEE Transactions on Computers 66 12 (2017): 2005-2018. http://www.scopus.com/inward/record.url?eid=2-s2.0-85038213471&partnerID=MN8TOARS.
    10.1109/TC.2017.2690420
  31. Santander-Jimenez, S.; Vega-Rodriguez, M.A.; Sousa, L.. "Multiobjective Frog-Leaping Optimization for the Study of Ancestral Relationships in Protein Data". IEEE Transactions on Evolutionary Computation (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85035114869&partnerID=MN8TOARS.
    10.1109/TEVC.2017.2774599
  32. Molahosseini, A.S.; Zarandi, A.A.E.; Martins, P.; Sousa, L.. "A Multifunctional Unit for Designing Efficient RNS-based Datapaths". IEEE Access (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85032451001&partnerID=MN8TOARS.
    10.1109/ACCESS.2017.2766841
  33. Sousa, L.; Roma, N.. "Special issue on real-time energy-aware circuits and systems for HEVC and for its 3D and SVC extensions". Journal of Real-Time Image Processing 13 1 (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85017114439&partnerID=MN8TOARS.
    10.1007/s11554-017-0675-6
  34. Entezari-Maleki, R.; Sousa, L.; Movaghar, A.. "Performance and power modeling and evaluation of virtualized servers in IaaS clouds". Information Sciences 394-395 (2017): 106-122. http://www.scopus.com/inward/record.url?eid=2-s2.0-85013231631&partnerID=MN8TOARS.
    10.1016/j.ins.2017.02.024
  35. Reza Entezari-Maleki; Sayed Ehsan Etesami; Negar Ghorbani; Arian Akhavan Niaki; Leonel Sousa; Ali Movaghar. "Modeling and Evaluation of Service Composition in Commercial Multiclouds Using Timed Colored Petri Nets". IEEE Transactions on Systems, Man, and Cybernetics: Systems (2017): 1-15. https://doi.org/10.1109/TSMC.2017.2768586.
    10.1109/TSMC.2017.2768586
  36. Emrani Zarandi, A.A.; Molahosseini, A.S.; Sousa, L.; Hosseinzadeh, M.. "An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2k, 2P-1". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 1 (2017): 48-59. http://www.scopus.com/inward/record.url?eid=2-s2.0-84975687924&partnerID=MN8TOARS.
    10.1109/TVLSI.2016.2577609
  37. Wang, B.; de Souza, D.F.; Alvarez-Mesa, M.; Chi, C.C.; Juurlink, B.; Ilic, A.; Roma, N.; Sousa, L.. "GPU Parallelization of HEVC In-Loop Filters". International Journal of Parallel Programming 45 6 (2017): 1515-1535. http://www.scopus.com/inward/record.url?eid=2-s2.0-85009290244&partnerID=MN8TOARS.
    10.1007/s10766-017-0488-z
  38. Sousa, L.; Martins, P.. "Sign Detection and Number Comparison on RNS 3-Moduli Sets { 2n- 1 , 2n+x, 2n+ 1 }". Circuits, Systems, and Signal Processing 36 3 (2017): 1224-1246. http://www.scopus.com/inward/record.url?eid=2-s2.0-85013026966&partnerID=MN8TOARS.
    10.1007/s00034-016-0354-z
  39. Andrade, J.; George, N.; Karras, K.; Novo, D.; Pratas, F.; Sousa, L.; Ienne, P.; Falcao, G.; Silva, V.. "Design Space Exploration of LDPC Decoders using High-Level Synthesis". IEEE Access (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85028916575&partnerID=MN8TOARS.
    10.1109/ACCESS.2017.2727221
  40. Ilic, A.; Pratas, F.; Sousa, L.. "Beyond the roofline: Cache-aware power and energy-efficiency modeling for multi-cores". IEEE Transactions on Computers 66 1 (2017): 52-58. http://www.scopus.com/inward/record.url?eid=2-s2.0-85007004930&partnerID=MN8TOARS.
    10.1109/TC.2016.2582151
  41. Santander-Jiménez, S.; Ilic, A.; Sousa, L.; Vega-Rodríguez, M.A.. "Accelerating the phylogenetic parsimony function on heterogeneous systems". Concurrency Computation 29 8 (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-85007137867&partnerID=MN8TOARS.
    10.1002/cpe.4046
  42. Rojek, K.; Ilic, A.; Wyrzykowski, R.; Sousa, L.. "Energy-aware mechanism for stencil-based MPDATA algorithm with constraints". Concurrency Computation 29 8 (2017): http://www.scopus.com/inward/record.url?eid=2-s2.0-84992365691&partnerID=MN8TOARS.
    10.1002/cpe.4016
  43. Seyed Mostafa Mirhosseini; AMIR SABBAGH MOLAHOSSEINI; Mehdi Hosseinzadeh; Leonel Sousa; Paulo Martins. "A Reduced-Bias Approach with a Lightweight Hard-Multiple Generator to Design Radix-8 Modulo 2n+1 Multiplier". IEEE Transactions on Circuits and Systems II: Express Briefs (2016): 1-1. http://dx.doi.org/10.1109/TCSII.2016.2601285.
    10.1109/TCSII.2016.2601285
  44. Ilic, A.; Momcilovic, S.; Roma, N.; Sousa, L.. "Adaptive scheduling framework for real-time video encoding on heterogeneous systems". IEEE Transactions on Circuits and Systems for Video Technology 26 3 (2016): 597-611. http://www.scopus.com/inward/record.url?eid=2-s2.0-84964388545&partnerID=MN8TOARS.
    10.1109/TCSVT.2015.2402893
  45. Tian, Y.; Chen, M.; Sousa, L.. "Ubiquitous multimedia: Emerging research on multimedia computing". IEEE Multimedia 23 2 (2016): 12-15. http://www.scopus.com/inward/record.url?eid=2-s2.0-84969627627&partnerID=MN8TOARS.
    10.1109/MMUL.2016.28
  46. Andrade, J.; Falcao, G.; Silva, V.; Sousa, L.. "A Survey on Programmable LDPC Decoders". IEEE Access 4 (2016): 6704-6718. http://www.scopus.com/inward/record.url?eid=2-s2.0-85027072371&partnerID=MN8TOARS.
    10.1109/ACCESS.2016.2594265
  47. Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa. "GHEVC: An Efficient HEVC Decoder for Graphics Processing Units". IEEE Transactions on Multimedia (2016): 1-1. http://dx.doi.org/10.1109/TMM.2016.2625261.
    10.1109/TMM.2016.2625261
  48. Pettenghi, H.; Chaves, R.; Matos, R.D.; Sousa, L.. "Method for designing two levels RNS reverse converters for large dynamic ranges". Integration, the VLSI Journal 55 (2016): 22-29. http://www.scopus.com/inward/record.url?eid=2-s2.0-84960338141&partnerID=MN8TOARS.
    10.1016/j.vlsi.2016.02.004
  49. Sousa, L.; Antão, S.; Martins, P.. "Combining Residue Arithmetic to Design Efficient Cryptographic Circuits and Systems". IEEE Circuits and Systems Magazine 16 4 (2016): 6-32. http://www.scopus.com/inward/record.url?eid=2-s2.0-84999143149&partnerID=MN8TOARS.
    10.1109/MCAS.2016.2614714
  50. de Souza, D.F.; Ilic, A.; Roma, N.; Sousa, L.. "GPU-assisted HEVC intra decoder". Journal of Real-Time Image Processing 12 2 (2016): 531-547. http://www.scopus.com/inward/record.url?eid=2-s2.0-84936869496&partnerID=MN8TOARS.
    10.1007/s11554-015-0519-1
  51. Sousa, L.. "2n RNS Scalers for Extended 4-Moduli Sets". IEEE Transactions on Computers 64 12 (2015): 3322-3334. http://www.scopus.com/inward/record.url?eid=2-s2.0-84946924535&partnerID=MN8TOARS.
    10.1109/TC.2015.2401026
  52. Tay, T.F.; Chang, C.-H.; Sousa, L.. "Base Transformation with Injective Residue Mapping for Dynamic Range Reduction in RNS". IEEE Transactions on Circuits and Systems I: Regular Papers 62 9 (2015): 2248-2259. http://www.scopus.com/inward/record.url?eid=2-s2.0-84940994353&partnerID=MN8TOARS.
    10.1109/TCSI.2015.2451871
  53. Gaspar, F.; Taniça, L.; Tomás, P.; Ilic, A.; Sousa, L.. "A framework for application-guided task management on heterogeneous embedded systems". ACM Transactions on Architecture and Code Optimization 12 4 (2015): http://www.scopus.com/inward/record.url?eid=2-s2.0-84954138399&partnerID=MN8TOARS.
    10.1145/2835177
  54. Sousa, L.; Martins, P.. "Efficient sign identification engines for integers represented in RNS extended 3-moduli set {2(n)-1, 2(n+k), 2(n)+1}". Electronics Letters 50 16 (2014): 1138-+.
    10.1049/el.2014.2029
  55. Antao, Samuel; Sousa, Leonel. "A Flexible Architecture for Modular Arithmetic Hardware Accelerators based on RNS". Journal of Signal Processing Systems For Signal Image and Video Technology 76 3 (2014): 249-259.
    10.1007/s11265-014-0879-y
  56. Momcilovic, Svetislav; Ilic, Aleksandar; Roma, Nuno; Sousa, Leonel. "Dynamic Load Balancing for Real-Time Video Encoding on Heterogeneous CPU plus GPU Systems". Ieee Transactions on Multimedia 16 1 (2014): 108-121.
    10.1109/TMM.2013.2284892
  57. Pettenghi, H.; Cotofana, S.; Sousa, L.. "Efficient method for designing modulo {2n ± k} multipliers". Journal of Circuits, Systems and Computers 23 1 (2014): http://www.scopus.com/inward/record.url?eid=2-s2.0-84893748174&partnerID=MN8TOARS.
    10.1142/S0218126614500017
  58. Matutino, P.M.; Chaves, R.; Sousa, L.. "Arithmetic-Based Binary-to-RNS Converter Modulo {2n ±k} for jn-Bit Dynamic Range". IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2014): http://www.scopus.com/inward/record.url?eid=2-s2.0-84898691348&partnerID=MN8TOARS.
    10.1109/TVLSI.2014.2314174
  59. Matutino, P.M.; Chaves, R.; Sousa, L.. "An Efficient Scalable RNS Architecture for Large Dynamic Ranges". Journal of Signal Processing Systems (2014): 1-15. http://www.scopus.com/inward/record.url?eid=2-s2.0-84895775925&partnerID=MN8TOARS.
    10.1007/s11265-014-0875-2
  60. Zarandi, A.A.E.; Molahosseini, A.S.; Hosseinzadeh, M.; Sorouri, S.; Antao, S.; Sousa, L.. "Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations". IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2014): http://www.scopus.com/inward/record.url?eid=2-s2.0-84894387848&partnerID=MN8TOARS.
    10.1109/TVLSI.2014.2305392
  61. Dias, T.; Roma, N.; Sousa, L.. "Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs". Eurasip Journal on Advances in Signal Processing 2014 1 (2014): 1-15. http://www.scopus.com/inward/record.url?eid=2-s2.0-84919926224&partnerID=MN8TOARS.
    10.1186/1687-6180-2014-108
  62. Pettenghi, H.; Pratas, F.; Sousa, L.. "Method for Designing Efficient Mixed Radix Multipliers". Circuits, Systems, and Signal Processing 33 10 (2014): 3165-3193. http://www.scopus.com/inward/record.url?eid=2-s2.0-84919341672&partnerID=MN8TOARS.
    10.1007/s00034-014-9799-0
  63. Antão, S.; Sousa, L.. "The CRNS framework and its application to programmable and reconfigurable cryptography". Transactions on Architecture and Code Optimization 9 4 (2013): http://www.scopus.com/inward/record.url?eid=2-s2.0-84872943866&partnerID=MN8TOARS.
    10.1145/2400682.2400692
  64. Sousa, L.; Antao, S.; Germano, J.. "A lab project on the design and implementation of programmable and configurable embedded systems". IEEE Transactions on Education 56 3 (2013): 322-328. http://www.scopus.com/inward/record.url?eid=2-s2.0-84881370511&partnerID=MN8TOARS.
    10.1109/TE.2012.2222411
  65. Pettenghi, H.; Chaves, R.; Sousa, L.. "RNS reverse converters for moduli sets with dynamic ranges up to (8n+1)-bit". IEEE Transactions on Circuits and Systems I: Regular Papers 60 6 (2013): 1487-1500. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878421822&partnerID=MN8TOARS.
    10.1109/TCSI.2012.2220460
  66. Ilic, A.; Pratas, F.; Sousa, L.. "Cache-aware Roofline model: Upgrading the loft". IEEE Computer Architecture Letters (2013): http://www.scopus.com/inward/record.url?eid=2-s2.0-84877611135&partnerID=MN8TOARS.
    10.1109/L-CA.2013.6
  67. Ambrose, J.A.; Pettenghi, H.; Sousa, L.. "DARNS: A randomized multi-modulo RNS architecture for double-and-add in ECC to prevent power analysis side channel attacks". Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (2013): 620-625. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877732524&partnerID=MN8TOARS.
    10.1109/ASPDAC.2013.6509667
  68. Momcilovic, S.; Roma, N.; Sousa, L.. "Multi-level parallelization of advanced video coding on hybrid CPU+GPU platforms". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 7640 LNCS (2013): 165-174. http://www.scopus.com/inward/record.url?eid=2-s2.0-84874414091&partnerID=MN8TOARS.
    10.1007/978-3-642-36949-0_19
  69. Dias, T.; López, S.; Roma, N.; Sousa, L.. "Scalable unified transform architecture for advanced video coding embedded systems". International Journal of Parallel Programming 41 2 (2013): 236-260. http://www.scopus.com/inward/record.url?eid=2-s2.0-84879604020&partnerID=MN8TOARS.
    10.1007/s10766-012-0221-x
  70. Matutino, P.M.; Chaves, R.; Sousa, L.. "A compact and scalable RNS architecture". Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors (2013): 125-132. http://www.scopus.com/inward/record.url?eid=2-s2.0-84883441961&partnerID=MN8TOARS.
    10.1109/ASAP.2013.6567565
  71. Sousa, L.; Antao, S.; Chaves, R.. "On the Design of RNS Reverse Converters for the Four-Moduli Set{2 s + 1, 2n-1, 2n, 2n+1 + 1}". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 10 (2013): 1945-1949. http://www.scopus.com/inward/record.url?eid=2-s2.0-84884576977&partnerID=MN8TOARS.
    10.1109/TVLSI.2012.2219564
  72. Momcilovic, S.; Roma, N.; Sousa, L.. "Exploiting task and data parallelism for advanced video coding on hybrid CPU + GPU platforms". Journal of Real-Time Image Processing (2013): 1-17. http://www.scopus.com/inward/record.url?eid=2-s2.0-84878237692&partnerID=MN8TOARS.
    10.1007/s11554-013-0357-y
  73. Pratas, F.; Oriato, D.; Pell, O.; Mata, R.A.; Sousa, L.. "Accelerating the computation of induced dipoles for molecular mechanics with dataflow engines". Proceedings - 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2013 (2013): 177-180. http://www.scopus.com/inward/record.url?eid=2-s2.0-84881180229&partnerID=MN8TOARS.
    10.1109/FCCM.2013.34
  74. Pettenghi, H.; Chaves, R.; Sousa, L.. "Method to Design General RNS Reverse Converters for Extended Moduli Sets". IEEE Transactions on Circuits and Systems II: Express Briefs (2013): http://www.scopus.com/inward/record.url?eid=2-s2.0-84887281642&partnerID=MN8TOARS.
    10.1109/TCSII.2013.2286433
  75. Dias, T.; Rosário, L.; Roma, N.; Sousa, L.. "High performance unified architecture for forward and inverse quantization in H.264/AVC". Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012 (2012): 632-639. http://www.scopus.com/inward/record.url?eid=2-s2.0-84872949049&partnerID=MN8TOARS.
    10.1109/DSD.2012.73
  76. Antão, S.; Chaves, R.; Sousa, L.. "Reconfigurable Architecture for Cryptography over Binary Finite Fields". Embedded Systems: Hardware, Design, and Implementation (2012): 319-362. http://www.scopus.com/inward/record.url?eid=2-s2.0-84886451036&partnerID=MN8TOARS.
    10.1002/9781118468654.ch14
  77. Matutino, P.M.; Pettenghi, H.; Chaves, R.; Sousa, L.. "RNS arithmetic units for modulo {2n±k}". Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012 (2012): 795-802. http://www.scopus.com/inward/record.url?eid=2-s2.0-84872972750&partnerID=MN8TOARS.
    10.1109/DSD.2012.114
  78. Clarke, D.; Ilic, A.; Lastovetsky, A.; Sousa, L.. "Hierarchical partitioning algorithm for scientific computing on highly heterogeneous CPU + GPU clusters". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 7484 LNCS (2012): 489-501. http://www.scopus.com/inward/record.url?eid=2-s2.0-84867635590&partnerID=MN8TOARS.
    10.1007/978-3-642-32820-6_49
  79. Ferreira, R.; Paz, E.; Freitas, P.P.; Ribeiro, J.; Germano, J.; Sousa, L.. "2-axis magnetometers based on full wheatstone bridges incorporating magnetic tunnel junctions connected in series". IEEE Transactions on Magnetics 48 11 (2012): 4107-4110. http://www.scopus.com/inward/record.url?eid=2-s2.0-84867774493&partnerID=MN8TOARS.
    10.1109/TMAG.2012.2202381
  80. Sousa, L.; Antão, S.. "VLSI reverse converter for RNS based on the moduli set {2n + 1,2n - 1,22n+1 - 3,22n-2}". Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012 (2012): 411-414. http://www.scopus.com/inward/record.url?eid=2-s2.0-84872922590&partnerID=MN8TOARS.
    10.1109/DSD.2012.138
  81. Pratas, F.; Tomas, P.; Trancoso, P.; Sousa, L.. "Energy efficient stream-based configurable architecture for embedded platforms". Proceedings - 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2012 (2012): 193-200. http://www.scopus.com/inward/record.url?eid=2-s2.0-84873557347&partnerID=MN8TOARS.
    10.1109/SAMOS.2012.6404174
  82. Falcao, G.; Gomes, M.; Silva, V.; Sousa, L.; Cacheira, J.. "Configurable M-factor VLSI DVB-S2 LDPC decoder architecture with optimized memory tiling design". Eurasip Journal on Wireless Communications and Networking 2012 (2012): http://www.scopus.com/inward/record.url?eid=2-s2.0-84872838646&partnerID=MN8TOARS.
    10.1186/1687-1499-2012-98
  83. Ilic, A.; Sousa, L.. "Scheduling divisible loads on heterogeneous desktop systems with limited memory". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 7155 LNCS PART 1 (2012): 491-501. http://www.scopus.com/inward/record.url?eid=2-s2.0-84882714453&partnerID=MN8TOARS.
    10.1007/978-3-642-29737-3-54
  84. Pratas, F.; Sousa, L.; Dieterich, J.M.; Mata, R.A.. "Computation of induced dipoles in molecular mechanics simulations using graphics processors". Journal of Chemical Information and Modeling 52 5 (2012): 1159-1166. http://www.scopus.com/inward/record.url?eid=2-s2.0-84861519968&partnerID=MN8TOARS.
    10.1021/ci200564x
  85. Ilic, A.; Sousa, L.. "On realistic divisible load scheduling in highly heterogeneous distributed systems". Proceedings - 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2012 (2012): 426-433. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862136359&partnerID=MN8TOARS.
    10.1109/PDP.2012.56
  86. Antão, S.; Bajard, J.-C.; Sousa, L.. "RNS-based elliptic curve point multiplication for massive parallel architectures". Computer Journal 55 5 (2012): 629-647. http://www.scopus.com/inward/record.url?eid=2-s2.0-84860693558&partnerID=MN8TOARS.
    10.1093/comjnl/bxr119
  87. Sousa, L.; Antão, S.. "Erratum: MRC-based RNS reverse converters for the four-moduli sets {2 n + 1, 2 n - 1, 2 n, 2 2n+1 - 1} and {2 n + 1, 2 n - 1, 2 n, 2 2n+1 - 1} (IEEE Transactions on Circuits and Systems II: Express Briefs (2012) 59:4 (244-248))". IEEE Transactions on Circuits and Systems II: Express Briefs 59 5 (2012): http://www.scopus.com/inward/record.url?eid=2-s2.0-84861200187&partnerID=MN8TOARS.
    10.1109/TCSII.2012.2195918
  88. Sánchez, S.; Ramalho, R.; Sousa, L.; Plaza, A.. "Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs". Journal of Real-Time Image Processing (2012): 1-15. http://www.scopus.com/inward/record.url?eid=2-s2.0-84866136573&partnerID=MN8TOARS.
    10.1007/s11554-012-0269-2
  89. Ilic, A.; Sousa, L.. "Simultaneous multi-level divisible load balancing for heterogeneous desktop systems". Proceedings of the 2012 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012 (2012): 683-690. http://www.scopus.com/inward/record.url?eid=2-s2.0-84867244557&partnerID=MN8TOARS.
    10.1109/ISPA.2012.101
  90. Falcao, G.; Silva, V.; Sousa, L.; Andrade, J.. "Portable LDPC decoding on multicores using OpenCL [Applications Corner]". IEEE Signal Processing Magazine 29 4 (2012): http://www.scopus.com/inward/record.url?eid=2-s2.0-84862527596&partnerID=MN8TOARS.
    10.1109/MSP.2012.2192212
  91. Pratas, F.; Trancoso, P.; Sousa, L.; Stamatakis, A.; Shi, G.; Kindratenko, V.. "Fine-grain parallelism using multi-core, Cell/BE, and GPU systems". Parallel Computing 38 8 (2012): 365-390. http://www.scopus.com/inward/record.url?eid=2-s2.0-84862697881&partnerID=MN8TOARS.
    10.1016/j.parco.2011.08.002
  92. Sousa, L.; Antão, S.. "MRC-based RNS reverse converters for the four-moduli sets 2 n + 1, 2 n - 1, 2 n, 2 2n + 1 - 1 and 2 n + 1, 2 n - 1, 2 2n, 2 2n + 1 - 1". IEEE Transactions on Circuits and Systems II: Express Briefs 59 4 (2012): 244-248. http://www.scopus.com/inward/record.url?eid=2-s2.0-84860214853&partnerID=MN8TOARS.
    10.1109/TCSII.2012.2188456
  93. Pettenghi, H.; Sousa, L.; Ambrose, J.A.. "Efficient implementation of multi-moduli architectures for binary-to-RNS conversion". Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (2012): 819-824. http://www.scopus.com/inward/record.url?eid=2-s2.0-84859986490&partnerID=MN8TOARS.
    10.1109/ASPDAC.2012.6165068
  94. Matutino, P.M.; Chaves, R.; Sousa, L.. "Binary-to-RNS conversion units for moduli {2 n ± 3}". Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 (2011): 460-467. http://www.scopus.com/inward/record.url?eid=2-s2.0-80054983594&partnerID=MN8TOARS.
    10.1109/DSD.2011.65
  95. Dias, T.; Lopez, S.; Roma, N.; Sousa, L.. "High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems". Proceedings - 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2011 (2011): 225-232. http://www.scopus.com/inward/record.url?eid=2-s2.0-80155210115&partnerID=MN8TOARS.
    10.1109/SAMOS.2011.6045465
  96. Roma, N.; Sousa, L.. "A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing". Signal Processing 91 11 (2011): 2443-2464. http://www.scopus.com/inward/record.url?eid=2-s2.0-79960173837&partnerID=MN8TOARS.
    10.1016/j.sigpro.2011.04.015
  97. Falcao, G.; Silva, V.; Sousa, L.. "Parallel LDPC decoding". GPU Computing Gems Emerald Edition (2011): 619-628. http://www.scopus.com/inward/record.url?eid=2-s2.0-84884462188&partnerID=MN8TOARS.
    10.1016/B978-0-12-384988-5.00038-3
  98. Martins, J.C.; Caeiro, J.J.; Sousa, L.A.. "A new approach to system identification and parameter tuning with multiple model adaptive estimators". ISPA 2011 - 7th International Symposium on Image and Signal Processing and Analysis (2011): 72-77. http://www.scopus.com/inward/record.url?eid=2-s2.0-83455169066&partnerID=MN8TOARS.
  99. Momcilovic, S.; Sousa, L.. "Modeling and evaluating non-shared memory CELL/BE type multi-core architectures for local image and video processing". Journal of Signal Processing Systems 62 3 (2011): 301-318. http://www.scopus.com/inward/record.url?eid=2-s2.0-79954615460&partnerID=MN8TOARS.
    10.1007/s11265-010-0463-z
  100. Falcao, G.; Sousa, L.; Silva, V.. "Massively LDPC decoding on multicore architectures". IEEE Transactions on Parallel and Distributed Systems 22 2 (2011): 309-322. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650893141&partnerID=MN8TOARS.
    10.1109/TPDS.2010.66
  101. Robert, Y.; Sousa, L.; Trystram, D.. "Parallel computing - Special issue". Parallel Computing 37 8 (2011): 329-330. http://www.scopus.com/inward/record.url?eid=2-s2.0-79960499405&partnerID=MN8TOARS.
    10.1016/j.parco.2011.03.004
  102. Falcao, G.; Andrade, J.; Silva, V.; Sousa, L.. "Real-time DVB-S2 LDPC decoding on many-core GPU accelerators". ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings (2011): 1685-1688. http://www.scopus.com/inward/record.url?eid=2-s2.0-80051659224&partnerID=MN8TOARS.
    10.1109/ICASSP.2011.5946824
  103. Falcao, G.; Andrade, J.; Silva, V.; Sousa, L.. "GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection". Electronics Letters 47 9 (2011): 542-543. http://www.scopus.com/inward/record.url?eid=2-s2.0-79955639564&partnerID=MN8TOARS.
    10.1049/el.2011.0201
  104. Dias, T.; López, S.; Roma, N.; Sousa, L.. "A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs". IEEE Transactions on Consumer Electronics 57 2 (2011): 936-944. http://www.scopus.com/inward/record.url?eid=2-s2.0-79960929422&partnerID=MN8TOARS.
    10.1109/TCE.2011.5955243
  105. LOPES, PAC; GERMANO, J; DE ALMEIDA, TM; SOUSA, LA; PIEDADE, MS; CARDOSO, FA; FERREIRA, HA; FREITAS, PP. "Measuring and Extraction of Biological Information on New Handheld Biochip-Based Microsystem". IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 59 1 (2010): 56-62.
    10.1109/TIM.2008.2003321
  106. Dias, T.; Roma, N.; Sousa, L.. "H.264/AVC framework for multi-core embedded video encoders". 2010 International Symposium on System-on-Chip Proceedings, SoC 2010 (2010): 89-92. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650214776&partnerID=MN8TOARS.
    10.1109/ISSOC.2010.5625538
  107. Dias, T.; Roma, N.; Sousa, L.. "Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems". 2010 Conference on Design and Architectures for Signal and Image Processing, DASIP2010 (2010): 242-249. http://www.scopus.com/inward/record.url?eid=2-s2.0-79952338683&partnerID=MN8TOARS.
    10.1109/DASIP.2010.5706271
  108. Antão, S.; Sousa, L.. "Exploiting SIMD extensions for linear image processing with OpenCL". Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (2010): 425-430. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650724755&partnerID=MN8TOARS.
    10.1109/ICCD.2010.5647672
  109. Cardoso, F.A.; Martins, V.C.; Fonseca, L.P.; Germano, J.; Sousa, L.A.; Piedade, M.S.; Freitas, P.P.. "Spintronic microfluidic platform for biomedical and environmental applications". Proceedings of SPIE - The International Society for Optical Engineering 7653 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-77957849646&partnerID=MN8TOARS.
    10.1117/12.868407
  110. Ramalho, R.; Tomás, P.; Sousa, L.. "Efficient independent component analysis on a GPU". Proceedings - 10th IEEE International Conference on Computer and Information Technology, CIT-2010, 7th IEEE International Conference on Embedded Software and Systems, ICESS-2010, ScalCom-2010 (2010): 1128-1133. http://www.scopus.com/inward/record.url?eid=2-s2.0-78249245442&partnerID=MN8TOARS.
    10.1109/CIT.2010.205
  111. Falcao, G.; Sousa, L.; Silva, V.. "Embedded multicore architectures for LDPC decoding". Proceedings - 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010 (2010): 349-356. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650934148&partnerID=MN8TOARS.
    10.1109/ICSAMOS.2010.5642046
  112. Matutino, P.M.; Chaves, R.; Sousa, L.. "Arithmetic units for RNS moduli {2n - 3} and {2n + 3} operations". Proceedings - 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010 (2010): 243-246. http://www.scopus.com/inward/record.url?eid=2-s2.0-78649810172&partnerID=MN8TOARS.
    10.1109/DSD.2010.77
  113. Pettenghi, H.; Chaves, R.; Sousa, L.; Avedillo, M.J.. "An improved RNS generator 2n ± k based on threshold logic". Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 (2010): 119-124. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650934297&partnerID=MN8TOARS.
    10.1109/VLSISOC.2010.5642611
  114. Francisco, B.; Pratas, F.; Sousa, L.. "Unifying stream based and reconfigurable computing to design application accelerators". Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 (2010): 408-413. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650934957&partnerID=MN8TOARS.
    10.1109/VLSISOC.2010.5642696
  115. Sousa, L.; Suter, F.; Goldman, A.; Sakellariou, R.; Sinnen, O.. "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 6043 LNCS PART 1 (2010): 69-70. http://www.scopus.com/inward/record.url?eid=2-s2.0-77954599531&partnerID=MN8TOARS.
    10.1007/978-3-642-14122-5_10
  116. Momcilovic, S.; Sousa, L.. "Programming Cell/BE and GPUs systems for real-time video encoding". Proceedings of SPIE - The International Society for Optical Engineering 7724 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-77954569642&partnerID=MN8TOARS.
    10.1117/12.851365
  117. Pratas, F.; Mata, R.A.; Sousa, L.. "Iterative induced dipoles computation for molecular mechanics on GPUs". International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS (2010): 111-120. http://www.scopus.com/inward/record.url?eid=2-s2.0-77952252496&partnerID=MN8TOARS.
    10.1145/1735688.1735708
  118. Ilic, A.; Sousa, L.. "Collaborative execution environment for heterogeneous parallel systems". Proceedings of the 2010 IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum, IPDPSW 2010 (2010): http://www.scopus.com/inward/record.url?eid=2-s2.0-77954039604&partnerID=MN8TOARS.
    10.1109/IPDPSW.2010.5470835
  119. Gbolagade, K.A.; Chaves, R.; Sousa, L.; Cotofana, S.D.. "An improved RNS reverse converter for the {22n+1-1,2 n,2n-1} moduli set". ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (2010): 2103-2106. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955999090&partnerID=MN8TOARS.
    10.1109/ISCAS.2010.5537062
  120. Tomás, P.; Sousa, L.. "A quantitative analysis of firing rate estimators: Unveiling bias sources". Neurocomputing 73 16-18 (2010): 2944-2954. http://www.scopus.com/inward/record.url?eid=2-s2.0-78650309375&partnerID=MN8TOARS.
    10.1016/j.neucom.2010.07.016
  121. Rodrigues, A.; Roma, N.; Sousa, L.. "p264: Open platform for designing parallel H.264/AVC video encoders on multi-core systems". Proceedings of the International Workshop on Network and Operating System Support for Digital Audio and Video (2010): 81-86. http://www.scopus.com/inward/record.url?eid=2-s2.0-77954721032&partnerID=MN8TOARS.
    10.1145/1806565.1806586
  122. Antão, S.; Bajard, J.-C.; Sousa, L.. "Elliptic curve point multiplication on GPUs". Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors (2010): 192-199. http://www.scopus.com/inward/record.url?eid=2-s2.0-77955884060&partnerID=MN8TOARS.
    10.1109/ASAP.2010.5541000
  123. Martins, V.C.; Germano, J.; Cardoso, F.A.; Loureiro, J.; Cardoso, S.; Sousa, L.; Piedade, M.; Fonseca, L.P.; Freitas, P.P.. "Challenges and trends in the development of a magnetoresistive biochip portable platform". Journal of Magnetism and Magnetic Materials 322 9-12 (2010): 1655-1663. http://www.scopus.com/inward/record.url?eid=2-s2.0-77949294014&partnerID=MN8TOARS.
    10.1016/j.jmmm.2009.02.141
  124. Martins, V; Cardoso, F; Freitas, P; Germano, J; Cardoso, S; Sousa, L; Piedade, M; Fonseca, L. "Magnetoresistive biochip-based portable platforms for biomolecular recognition detection". New Biotechnology 25 (2009): S358-S359.
    10.1016/j.nbt.2009.06.866
  125. Falcão, G.; Yamagiwa, S.; Silva, V.; Sousa, L.. "Parallel ldpc decoding on gpus using a stream-based computing approach". Journal of Computer Science and Technology 24 5 (2009): 913-924. http://www.scopus.com/inward/record.url?eid=2-s2.0-70349591598&partnerID=MN8TOARS.
    10.1007/s11390-009-9266-8
  126. Pratas, F.; Sousa, L.. "Applying the stream-based computing model to design hardware accelerators: A case study". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 5657 LNCS (2009): 237-246. http://www.scopus.com/inward/record.url?eid=2-s2.0-70350365916&partnerID=MN8TOARS.
    10.1007/978-3-642-03138-0_26
  127. Yamagiwa, S.; Sousa, L.. "Modelling and programming stream-based distributed computing based on the meta-pipeline approach". International Journal of Parallel, Emergent and Distributed Systems 24 4 (2009): 311-330. http://www.scopus.com/inward/record.url?eid=2-s2.0-68949136723&partnerID=MN8TOARS.
    10.1080/17445760902719968
  128. Tomás, P.; Sousa, L.A.. "A feature selection algorithm for the regularization of neuron models". IEEE Transactions on Instrumentation and Measurement 58 11 (2009): 3824-3830. http://www.scopus.com/inward/record.url?eid=2-s2.0-70350335589&partnerID=MN8TOARS.
    10.1109/TIM.2009.2020822
  129. Falcão, G.; Silva, V.; Sousa, L.. "How GPUs can outperform ASICs for fast LDPC decoding". Proceedings of the International Conference on Supercomputing (2009): 390-399. http://www.scopus.com/inward/record.url?eid=2-s2.0-70449725272&partnerID=MN8TOARS.
    10.1145/1542275.1542330
  130. Antão, S.; Chaves, R.; Sousa, L.. "Compact and flexible microcoded elliptic curve processor for reconfigurable devices". Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009 (2009): 193-200. http://www.scopus.com/inward/record.url?eid=2-s2.0-74349086113&partnerID=MN8TOARS.
    10.1109/FCCM.2009.18
  131. Germano, J.; Ramalho, R.; Sousa, L.. "On the design of distributed autonomous embedded systems for biomedical applications". 2009 3rd International Conference on Pervasive Computing Technologies for Healthcare - Pervasive Health 2009, PCTHealth 2009 (2009): http://www.scopus.com/inward/record.url?eid=2-s2.0-70350749875&partnerID=MN8TOARS.
    10.4108/ICST.PERVASIVEHEALTH2009.5966
  132. Sousa, L.; Momcilovic, S.; Silva, V.; Falcão, G.. "Multi-core platforms for signal processing: Source and channel coding". Proceedings - 2009 IEEE International Conference on Multimedia and Expo, ICME 2009 (2009): 1809-1812. http://www.scopus.com/inward/record.url?eid=2-s2.0-70449595908&partnerID=MN8TOARS.
    10.1109/ICME.2009.5202874
  133. Germano, J.; Martins, V.C.; Cardoso, F.A.; Almeida, T.M.; Sousa, L.; Freitas, P.P.; Piedade, M.S.. "A portable and autonomous magnetic detection platform for biosensing". Sensors 9 6 (2009): 4119-4137. http://www.scopus.com/inward/record.url?eid=2-s2.0-67649610447&partnerID=MN8TOARS.
    10.3390/s90604119
  134. Martins, J.; Tomás, P.; Sousa, L.. "Neural code metrics: Analysis and application to the assessment of neural models". Neurocomputing 72 10-12 (2009): 2337-2350. http://www.scopus.com/inward/record.url?eid=2-s2.0-67349105614&partnerID=MN8TOARS.
    10.1016/j.neucom.2008.12.012
  135. Falcão, G.; Sousa, L.; Silva, V.; Marinho, J.. "Parallel LDPC decoding on the cell/B.E. Processor". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 5409 LNCS (2009): 389-403. http://www.scopus.com/inward/record.url?eid=2-s2.0-59049101875&partnerID=MN8TOARS.
    10.1007/978-3-540-92990-1_28
  136. Martins, V.C.; Cardoso, F.A.; Germano, J.; Cardoso, S.; Sousa, L.; Piedade, M.; Freitas, P.P.; Fonseca, L.P.. "Femtomolar limit of detection with a magnetoresistive biochip". Biosensors and Bioelectronics 24 8 (2009): 2690-2695. http://www.scopus.com/inward/record.url?eid=2-s2.0-62649174767&partnerID=MN8TOARS.
    10.1016/j.bios.2009.01.040
  137. Momcilovic, S.; Sousa, L.. "Development and evaluation of scalable video motion estimators on GPU". IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation (2009): 291-296. http://www.scopus.com/inward/record.url?eid=2-s2.0-74549159077&partnerID=MN8TOARS.
    10.1109/SIPS.2009.5336269
  138. Passos, G.; Roma, N.; Da Costa, B.A.; Sousa, L.; Lemos, J.M.. "Distributed software platform for automation and control of general anaesthesia". 8th International Symposium on Parallel and Distributed Computing, ISPDC 2009 (2009): 135-142. http://www.scopus.com/inward/record.url?eid=2-s2.0-74349113491&partnerID=MN8TOARS.
    10.1109/ISPDC.2009.34
  139. Pratas, F.; Trancoso, P.; Stamatakis, A.; Sousa, L.. "Fine-grain parallelism using multi-core, cell/BE, and GPU systems: Accelerating the phylogenetic likelihood function". Proceedings of the International Conference on Parallel Processing (2009): 9-17. http://www.scopus.com/inward/record.url?eid=2-s2.0-77951491232&partnerID=MN8TOARS.
    10.1109/ICPP.2009.30
  140. Gbolagade, K.A.; Chaves, R.; Sousa, L.; Cotofana, S.D.. "Residue-to-binary converters for the moduli set {22n+1-1,2 2n,2n-1}". ICAST 2009 - 2nd International Conference on Adaptive Science and Technology (2009): 26-33. http://www.scopus.com/inward/record.url?eid=2-s2.0-77950954216&partnerID=MN8TOARS.
    10.1109/ICASTECH.2009.5409752
  141. Yamagiwa, S.; Sousa, L.. "CaravelaMPI: Message passing interface for parallel GPU-based applications". 8th International Symposium on Parallel and Distributed Computing, ISPDC 2009 (2009): 161-168. http://www.scopus.com/inward/record.url?eid=2-s2.0-74349116988&partnerID=MN8TOARS.
    10.1109/ISPDC.2009.24
  142. Matutino, P.M.; Sousa, L.. "An RNS based specific processor for computing the minimum sum-of-absolute-differences". Proceedings - 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008 (2008): 768-775. http://www.scopus.com/inward/record.url?eid=2-s2.0-57649225925&partnerID=MN8TOARS.
    10.1109/DSD.2008.107
  143. Sebastião, N.; Dias, T.; Roma, N.; Flores, P.; Sousa, L.. "Application specific programmable IP core for motion estimation: Technology comparison targeting efficient embedded co-processing units". Proceedings - 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008 (2008): 181-188. http://www.scopus.com/inward/record.url?eid=2-s2.0-57749117242&partnerID=MN8TOARS.
    10.1109/DSD.2008.66
  144. Tomás, P.; Sousa, L.. "Statistical analysis of a spike train distance in poisson models". IEEE Signal Processing Letters 15 (2008): 357-360. http://www.scopus.com/inward/record.url?eid=2-s2.0-67349215196&partnerID=MN8TOARS.
    10.1109/LSP.2008.919994
  145. Pratas, F.; Gaydadjiev, G.; Berekovic, M.; Sousa, L.; Kaxiras, S.. "Low power microarchitecture with instruction reuse". Conference on Computing Frontiers - Proceedings of the 2008 Conference on Computing Frontiers, CF'08 (2008): 149-157. http://www.scopus.com/inward/record.url?eid=2-s2.0-56749164068&partnerID=MN8TOARS.
    10.1145/1366230.1366259
  146. Chaves, R.; Kuzmanov, G.; Sousa, L.. "On-the-fly attestation of reconfigurable hardware". Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL (2008): 71-76. http://www.scopus.com/inward/record.url?eid=2-s2.0-54949141187&partnerID=MN8TOARS.
    10.1109/FPL.2008.4629910
  147. Chaves, R.; Donchev, B.; Kuzmanov, G.; Sousa, L.; Vassiliadis, S.. "BRAM-LUT tradeoff on a polymorphic des design". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 4917 LNCS (2008): 55-65. http://www.scopus.com/inward/record.url?eid=2-s2.0-49949083117&partnerID=MN8TOARS.
    10.1007/978-3-540-77560-7_5
  148. Falcão, G.; Sousa, L.; Silva, V.. "Massive parallel LDPC decoding on GPU". Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP (2008): 83-90. http://www.scopus.com/inward/record.url?eid=2-s2.0-79959450830&partnerID=MN8TOARS.
  149. Antão, S.; Chaves, R.; Sousa, L.. "Efficient FPGA elliptic curve cryptographic processor over GF(2m)". Proceedings of the 2008 International Conference on Field-Programmable Technology, ICFPT 2008 (2008): 357-360. http://www.scopus.com/inward/record.url?eid=2-s2.0-63049129244&partnerID=MN8TOARS.
    10.1109/FPT.2008.4762417
  150. Tomás, P.; Martins, J.; Sousa, L.. "Towards a unified model for the retina: Static vs Dynamic integrate and fire models". BIOSIGNALS 2008 - Proceedings of the 1st International Conference on Bio-inspired Systems and Signal Processing 2 (2008): 528-533. http://www.scopus.com/inward/record.url?eid=2-s2.0-55649116193&partnerID=MN8TOARS.
  151. Falcão, G.; Silva, V.; Sousa, L.; Marinho, J.. "High coded data rate and multicodeword WiMAX LDPC decoding on Cell/BE". Electronics Letters 44 24 (2008): 1415-1417. http://www.scopus.com/inward/record.url?eid=2-s2.0-56549117046&partnerID=MN8TOARS.
    10.1049/el:20081927
  152. Cardoso, F.A.; Germano, J.; Ferreira, R.; Cardoso, S.; Martins, V.C.; Freitas, P.P.; Piedade, M.S.; Sousa, L.. "Detection of 130 nm magnetic particles by a portable electronic platform using spin valve and magnetic tunnel junction sensors". Journal of Applied Physics 103 7 (2008): http://www.scopus.com/inward/record.url?eid=2-s2.0-42149174270&partnerID=MN8TOARS.
    10.1063/1.2836713
  153. Martins, V.C.; Cardoso, F.A.; Loureiro, J.; Mercier, M.; Germano, J.; Cardoso, S.; Ferreira, R.; et al. "Integrated spintronic platforms for biomolecular recognition detection". AIP Conference Proceedings 1025 (2008): 150-175. http://www.scopus.com/inward/record.url?eid=2-s2.0-49149093096&partnerID=MN8TOARS.
    10.1063/1.2956811
  154. Chaves, R.; Kuzmanov, G.; Sousa, L.; Vassiliadis, S.. "Merged computation for Whirlpool hashing". Proceedings -Design, Automation and Test in Europe, DATE (2008): 272-275. http://www.scopus.com/inward/record.url?eid=2-s2.0-49749088708&partnerID=MN8TOARS.
    10.1109/DATE.2008.4484896
  155. Falcão, G.; Silva, V.; Gomes, M.; Sousa, L.. "Edge stream oriented LDPC decoding". Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2008 (2008): 237-244. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349097846&partnerID=MN8TOARS.
    10.1109/PDP.2008.12
  156. Chaves, R.; Kuzmanov, G.; Sousa, L.; Vassiliadis, S.. "Cost-efficient SHA hardware accelerators". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 8 (2008): 999-1008. http://www.scopus.com/inward/record.url?eid=2-s2.0-48349138632&partnerID=MN8TOARS.
    10.1109/TVLSI.2008.2000450
  157. Ribeiro, M.; Sousa, L.. "A run-time reconfigurable processor for video motion estimation". Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL (2007): 726-729. http://www.scopus.com/inward/record.url?eid=2-s2.0-48149101945&partnerID=MN8TOARS.
    10.1109/FPL.2007.4380755
  158. Beaumont, O.; Giménez, D.; Kalinov, A.; Lastovetsky, A.; Robert, Y.; Trystram, D.; Bahi, J.M.; et al. "Message from the HeteroPar 2007 chair". Proceedings - IEEE International Conference on Cluster Computing, ICCC (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-53349161194&partnerID=MN8TOARS.
    10.1109/CLUSTR.2007.4629275
  159. Dias, T.; Roma, N.; Sousa, L.; Ribeiro, M.. "Reconfigurable architectures and processors for real-time video motion estimation". Journal of Real-Time Image Processing 2 4 (2007): 191-205. http://www.scopus.com/inward/record.url?eid=2-s2.0-36949007430&partnerID=MN8TOARS.
    10.1007/s11554-007-0049-6
  160. Momcilovic, S.; Roma, N.; Sousa, L.. "An ASIP approach for adaptive AVC motion estimation". Proceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 (2007): 165-168. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349117190&partnerID=MN8TOARS.
    10.1109/RME.2007.4401838
  161. Roma, N.; Sousa, L.. "Efficient hybrid DCT-domain algorithm for video spatial downscaling". Eurasip Journal on Advances in Signal Processing 2007 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-36248999529&partnerID=MN8TOARS.
    10.1155/2007/57291
  162. Capela, S.; Tomás, P.; Sousa, L.. "Stochastic integrate-and-fire model for the Retina". European Signal Processing Conference (2007): 2514-2518. http://www.scopus.com/inward/record.url?eid=2-s2.0-84863759970&partnerID=MN8TOARS.
  163. Tomás, P.; Sousa, L.. "An efficient expectation-maximisation algorithm for spike classification". 2007 15th International Conference on Digital Signal Processing, DSP 2007 (2007): 203-206. http://www.scopus.com/inward/record.url?eid=2-s2.0-47649120984&partnerID=MN8TOARS.
    10.1109/ICDSP.2007.4288554
  164. Teodósio, T.; Sousa, L.. "QCA-LG: A tool for the automatic layout generation of QCA combinational circuits". 25th Norchip Conference, NORCHIP (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-50249146216&partnerID=MN8TOARS.
    10.1109/NORCHP.2007.4481078
  165. Tomás, P.; Sousa, L.. "Feature selection for the stochastic integrate and fire model". 2007 IEEE International Symposium on Intelligent Signal Processing, WISP (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-51149123002&partnerID=MN8TOARS.
    10.1109/WISP.2007.4447639
  166. Momcilovic, S.; Roma, N.; Sousa, L.. "Adaptive motion estimation algorithm for H.264/AVC". 2007 15th International Conference on Digital Signal Processing, DSP 2007 (2007): 519-522. http://www.scopus.com/inward/record.url?eid=2-s2.0-47349109075&partnerID=MN8TOARS.
    10.1109/ICDSP.2007.4288633
  167. Sousa, L.; Alegria, F.; Germano, J.. "Developing and integrating lab projects as important learning components in an embedded systems course". Proceedings - MSE 2007: 2007 IEEE International Conference on Microelectronic Systems Education: Educating Systems Designers for the Global Economy and a Secure World (2007): 113-114. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548709118&partnerID=MN8TOARS.
    10.1109/MSE.2007.33
  168. Lopes, P.A.C.; Germano, J.; Almeida, T.M.; Sousa, L.; Piedade, M.S.; Cardoso, F.; Ferreira, H.A.; Freitas, P.P.. "A new handheld biochip-based microsystem". Proceedings - IEEE International Symposium on Circuits and Systems (2007): 2379-2382. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548818525&partnerID=MN8TOARS.
  169. Sousa, L.A.; O'Connor, N.E.; Mattavelli, M.; Nunez, A.. "Embedded systems for portable and mobile video platforms". Eurasip Journal on Embedded Systems 2007 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-34547201443&partnerID=MN8TOARS.
    10.1155/2007/63250
  170. Chaves, R.; Sousa, L.. "Improving residue number system multiplication with more balanced moduli sets and enhanced modular arithmetic structures". IET Computers and Digital Techniques 1 5 (2007): 472-480. http://www.scopus.com/inward/record.url?eid=2-s2.0-34548707033&partnerID=MN8TOARS.
    10.1049/iet-cdt:20060059
  171. Yamagiwa, S.; Sousa, L.. "Design and implementation of a stream-based distributedcomputing platform using graphics processing units". 2007 Computing Frontiers, Conference Proceedings (2007): 197-204. http://www.scopus.com/inward/record.url?eid=2-s2.0-35348888479&partnerID=MN8TOARS.
    10.1145/1242531.1242561
  172. Sousa, L.. "Efficient method for magnitude comparison in RNS based on two pairs of conjugate moduli". Proceedings - Symposium on Computer Arithmetic (2007): 240-247. http://www.scopus.com/inward/record.url?eid=2-s2.0-36049028089&partnerID=MN8TOARS.
    10.1109/ARITH.2007.16
  173. Yamagiwa, S.; Sousa, L.; Antão, D.. "Data buffering optimization methods toward a uniform programming interface for GPU-based applications". 2007 Computing Frontiers, Conference Proceedings (2007): 205-212. http://www.scopus.com/inward/record.url?eid=2-s2.0-35348913236&partnerID=MN8TOARS.
    10.1145/1242531.1242562
  174. Yamagiwa, S.; Sousa, L.; Brandão, T.. "Meta-pipeline: A new execution mechanism for distributed pipeline processing". Sixth International Symposium on Parallel and Distributed Computing, ISPDC 2007 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-35348862457&partnerID=MN8TOARS.
    10.1109/ISPDC.2007.36
  175. Cardoso, F.A.; Ferreira, R.; Cardoso, S.; Concle, J.P.; Chu, V.; Freitas, P.P.; Germano, J.; et al. "Noise characteristics and particle detection limits in diode+MTJ matrix elements for biochip applications". IEEE Transactions on Magnetics 43 6 (2007): 2403-2405. http://www.scopus.com/inward/record.url?eid=2-s2.0-34249006505&partnerID=MN8TOARS.
    10.1109/TMAG.2007.893705
  176. Dias, T.; Momcilovic, S.; Roma, N.; Sousa, L.. "Adaptive motion estimation processor for autonomous video devices". Eurasip Journal on Embedded Systems 2007 (2007): http://www.scopus.com/inward/record.url?eid=2-s2.0-34250851339&partnerID=MN8TOARS.
    10.1155/2007/57234
  177. Yamagiwa, S.; Sousa, L.. "Caravela: A novel stream-based distributed computing environment". Computer 40 5 (2007): 70-77. http://www.scopus.com/inward/record.url?eid=2-s2.0-34248999394&partnerID=MN8TOARS.
    10.1109/MC.2007.161
  178. Sousa, L.; Piedade, M.; Germano, J.; Almeida, T.; Lopes, P.; Cardoso, F.; Freitas, P.. "Generic architecture designed for biomedical embedded systems". IFIP International Federation for Information Processing 231 (2007): 353-362. http://www.scopus.com/inward/record.url?eid=2-s2.0-34248352245&partnerID=MN8TOARS.
    10.1007/978-0-387-72258-0_30
  179. Chaves, R.; Kuzmanov, G.; Sousa, L.; Vassiliadis, S.. "Rescheduling for optimized SHA-1 calculation". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 4017 LNCS (2006): 425-434. http://www.scopus.com/inward/record.url?eid=2-s2.0-33746706915&partnerID=MN8TOARS.
    10.1007/11796435_43
  180. Piedade, R.; Sousa, L.. "Configurable embedded core for controlling electro-mechanical systems". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 3985 LNCS (2006): 18-23. http://www.scopus.com/inward/record.url?eid=2-s2.0-33748996779&partnerID=MN8TOARS.
  181. Sinnen, O.; Sousa, L.A.; Sandnes, F.E.. "Toward a realistic task scheduling model". IEEE Transactions on Parallel and Distributed Systems 17 3 (2006): 263-275. http://www.scopus.com/inward/record.url?eid=2-s2.0-32044471308&partnerID=MN8TOARS.
    10.1109/TPDS.2006.40
  182. Cardoso, F.A.; Ferreira, H.A.; Conde, J.P.; Chu, V.; Freitas, P.P.; Vidal, D.; Germano, J.; et al. "Diode/magnetic tunnel junction cell for fully scalable matrix-based biochip". Journal of Applied Physics 99 8 (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33646727137&partnerID=MN8TOARS.
    10.1063/1.2165148
  183. Cardoso, F.; Ferreira, H.; Freitas, P.; Conde, J.; Chu, V.; Germano, J.; Sousa, L.; et al. "Scalable magnetoresistive biochips for biomolecular recognition". INTERMAG 2006 - IEEE International Magnetics Conference (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-50249182117&partnerID=MN8TOARS.
    10.1109/INTMAG.2006.375831
  184. Martins, S.F.; Sousa, L.A.; Martins, J.C.. "Additive logistic regression applied to retina modelling". Proceedings - International Conference on Image Processing, ICIP 3 (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-48149103257&partnerID=MN8TOARS.
    10.1109/ICIP.2007.4379308
  185. Chaves, R.; Kuzmanov, G.; Vassiliadis, S.; Sousa, L.. "Reconfigurable memory based AES Co-processor". 20th International Parallel and Distributed Processing Symposium, IPDPS 2006 2006 (2006): http://www.scopus.com/inward/record.url?eid=2-s2.0-33847161354&partnerID=MN8TOARS.
    10.1109/IPDPS.2006.1639441
  186. Germano, J.; Piedade, M.S.; Sousa, L.; Almeida, T.M.; Lopes, P.; Cardoso, F.A.; Ferreira, H.A.; Freitas, P.P.. "Microsystem for biological analysis based on magnetoresistive sensing". 18th IMEKO World Congress 2006: Metrology for a Sustainable Development 2 (2006): 1107-1112. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877732286&partnerID=MN8TOARS.
  187. Chaves, R.; Kuzmanov, G.; Sousa, L.; Vassiliadis, S.. "Improving SHA-2 hardware implementations". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 4249 LNCS (2006): 298-310. http://www.scopus.com/inward/record.url?eid=2-s2.0-33750729555&partnerID=MN8TOARS.
  188. Lopes, P.A.C.; Germano, J.; Almeida, T.M.; Sousa, L.; Piedade, M.S.; Cardoso, F.; Ferreira, H.A.; Freitas, P.P.. "Determination of biological expression signals on a new handheld biochip-based microsystem". IEEE 2006 Biomedical Circuits and Systems Conference Healthcare Technology, BioCAS 2006 (2006): 57-60. http://www.scopus.com/inward/record.url?eid=2-s2.0-52949107593&partnerID=MN8TOARS.
    10.1109/BIOCAS.2006.4600307
  189. Dias, T.; Roma, N.; Sousa, L.. "Low power distance measurement unit for real-time hardware motion estimators". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 4148 LNCS (2006): 247-255. http://www.scopus.com/inward/record.url?eid=2-s2.0-33750083042&partnerID=MN8TOARS.
  190. Piedade, M.; Sousa, L.A.; de Almeida, T.M.; Germano, J.; da Costa, B.A.; Lemos, J.M.; Freitas, P.P.; Ferreira, H.A.; Cardoso, F.A.. "A new hand-held microsystem architecture for biological analysis". IEEE Transactions on Circuits and Systems I: Regular Papers 53 11 (2006): 2384-2395. http://www.scopus.com/inward/record.url?eid=2-s2.0-37849187907&partnerID=MN8TOARS.
    10.1109/TCSI.2006.884420
  191. Almeida, T.M.; Piedade, M.S.; Germano, J.; Lopes, P.C.; Sousa, L.; Cardoso, F.; Ferreira, H.; Freitas, P.. "Measurements and modelling of a magnetoresistive biosensor". IEEE 2006 Biomedical Circuits and Systems Conference Healthcare Technology, BioCAS 2006 (2006): 41-44. http://www.scopus.com/inward/record.url?eid=2-s2.0-52949142237&partnerID=MN8TOARS.
    10.1109/BIOCAS.2006.4600303
  192. Almeida, T.M.; Piedade, M.S.; Lopes, P.C.; Sousa, L.; Germano, J.; Cardoso, F.; Ferreira, H.A.; Freitas, P.P.. "Magnetoresistive biosensor modelling for biomolecular recognition". 18th IMEKO World Congress 2006: Metrology for a Sustainable Development 2 (2006): 1204-1209. http://www.scopus.com/inward/record.url?eid=2-s2.0-84877762119&partnerID=MN8TOARS.
  193. Momcilovic, S.; Dias, T.; Roma, N.; Sousa, L.. "Application specific instruction set processor for adaptive video motion estimation". Proceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006 (2006): 160-167. http://www.scopus.com/inward/record.url?eid=2-s2.0-34250827089&partnerID=MN8TOARS.
    10.1109/DSD.2006.25
  194. Piedade, M.; Gerald, J.; Sousa, L.A.; Tavares, G.; Tomás, P.. "Visual neuroprosthesis: A non invasive system for stimulating the cortex". IEEE Transactions on Circuits and Systems I: Regular Papers 52 12 (2005): 2648-2662. http://www.scopus.com/inward/record.url?eid=2-s2.0-29344437807&partnerID=MN8TOARS.
    10.1109/TCSI.2005.857923
  195. Roma, N.; Sousa, L.. "Least squares motion estimation algorithm in the compressed DCT domain for H.26x / MPEG-x video sequences". IEEE International Conference on Advanced Video and Signal Based Surveillance - Proceedings of AVSS 2005 2005 (2005): 576-581. http://www.scopus.com/inward/record.url?eid=2-s2.0-33846986792&partnerID=MN8TOARS.
    10.1109/AVSS.2005.1577332
  196. Dias, T.; Roma, N.; Sousa, L.. "Efficient VLSI architecture for real-time motion estimation in advanced video coding". Proceedings - IEEE International SOC Conference (2005): 91-92. http://www.scopus.com/inward/record.url?eid=2-s2.0-30844446274&partnerID=MN8TOARS.
  197. Martins, J.C.; Sousa, L.A.. "Performance comparison of computational retina models". Proceedings of the 5th IASTED International Conference on Visualization, Imaging, and Image Processing, VIIP 2005 (2005): 156-161. http://www.scopus.com/inward/record.url?eid=2-s2.0-48149110914&partnerID=MN8TOARS.
  198. Sousa, L.A.; Chaves, R.. "A universal architecture for designing efficient modulo 2n + 1 multipliers". IEEE Transactions on Circuits and Systems I: Regular Papers 52 6 (2005): 1166-1178. http://www.scopus.com/inward/record.url?eid=2-s2.0-22144485617&partnerID=MN8TOARS.
    10.1109/TCSI.2005.849143
  199. Sinnen, O.; Sousa, L.A.. "Communication contention in task scheduling". IEEE Transactions on Parallel and Distributed Systems 16 6 (2005): 503-515. http://www.scopus.com/inward/record.url?eid=2-s2.0-21244458140&partnerID=MN8TOARS.
    10.1109/TPDS.2005.64
  200. Dias, T.; Roma, N.; Sousa, L.. "Efficient motion vector refinement architecture for sub-pixel motion estimation systems". IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation 2005 (2005): 313-318. http://www.scopus.com/inward/record.url?eid=2-s2.0-33846972962&partnerID=MN8TOARS.
    10.1109/SIPS.2005.1579885
  201. Guapo, R.; Yamagiwa, S.; Sousa, L.. "On the implementation and evaluation of berkeley sockets on Maestro2 cluster computing environment". ISPDC 2005: 4th International Symposium on Parallel and Distributed Computing 2005 (2005): 317-324. http://www.scopus.com/inward/record.url?eid=2-s2.0-33749520848&partnerID=MN8TOARS.
    10.1109/ISPDC.2005.37
  202. Sousa, L.A.; Chaves, R.. "Erratum: "A universal architecture for designing efficient modulo 2n + 1 multipliers" (IEEE Transactions on Circuits and Systems - I: Regular Papers)". IEEE Transactions on Circuits and Systems I: Regular Papers 52 9 (2005): http://www.scopus.com/inward/record.url?eid=2-s2.0-27144539328&partnerID=MN8TOARS.
    10.1109/TCSI.2005.856130
  203. Vassiliadis, S.; Sousa, L.; Gaydadjiev, G.N.. "The midlifekicker microarchitecture evaluation metric". Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors (2005): 92-97. http://www.scopus.com/inward/record.url?eid=2-s2.0-24944538110&partnerID=MN8TOARS.
    10.1109/ASAP.2005.62
  204. Leong, M.; Vasconcelos, P.; Fernandes, J.R.; Sousa, L.. "A programmable cellular neural network circuit". Proceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004 (2004): 186-191. http://www.scopus.com/inward/record.url?eid=2-s2.0-14244262303&partnerID=MN8TOARS.
  205. Sinnen, O.; Sousa, L.. "Task scheduling: Considering the processor involvement in communication". Proceedings - ISPDC 2004: Third International Symposium on Parallel and Distributed Computing/HeteroPar '04: Third International Workshop on Algorithms, Models and Tools for Parallel Computing on Hete (2004): 328-335. http://www.scopus.com/inward/record.url?eid=2-s2.0-19644371754&partnerID=MN8TOARS.
    10.1109/ISPDC.2004.48
  206. Sinnen, O.; Sousa, L.. "List scheduling: Extension for contention awareness and evaluation of node priorities for heterogeneous cluster architectures". Parallel Computing 30 1 (2004): 81-101. http://www.scopus.com/inward/record.url?eid=2-s2.0-0347601909&partnerID=MN8TOARS.
    10.1016/j.parco.2003.09.002
  207. Sinnen, O.; Sousa, L.. "On Task Scheduling Accuracy: Evaluation Methodology and Results". Journal of Supercomputing 27 2 (2004): 177-194. http://www.scopus.com/inward/record.url?eid=2-s2.0-0742307479&partnerID=MN8TOARS.
    10.1023/B:SUPE.0000009321.92150.64
  208. Chaves, R.; Sousa, L.. "{2n + 1, 2n+k, 2n - 1}: A new RNS moduli set extension". Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004 (2004): 210-217. http://www.scopus.com/inward/record.url?eid=2-s2.0-13944271397&partnerID=MN8TOARS.
    10.1109/DSD.2004.1333279
  209. Ferreira, K.; Yamagiwa, S.; Sousa, L.; Aoki, K.; Wada, K.; Campos, L.M.. "Distributed shared memory system based on the Maestro2 high performance cluster network". Proceedings - ISPDC 2004: Third International Symposium on Parallel and Distributed Computing/HeteroPar '04: Third International Workshop on Algorithms, Models and Tools for Parallel Computing on Hete (2004): 91-96. http://www.scopus.com/inward/record.url?eid=2-s2.0-19644384917&partnerID=MN8TOARS.
    10.1109/ISPDC.2004.19
  210. Yamagiwa, S.; Ferreira, K.; Campos, L.M.; Aoki, K.; Ono, M.; Wada, K.; Fukuda, M.; Sousa, L.. "On the performance of maestro2 high performance network equipment, using new improvement techniques". IEEE International Performance, Computing and Communications Conference, Proceedings 23 (2004): 103-110. http://www.scopus.com/inward/record.url?eid=2-s2.0-2442570858&partnerID=MN8TOARS.
  211. Aoki, K.; Yamagiwa, S.; Ferreira, K.; Campos, L.M.; Ono, M.; Wada, K.; Sousa, L.. "Maestro2: High speed network technology for high performance computing". IEEE International Conference on Communications 2 (2004): 1033-1037. http://www.scopus.com/inward/record.url?eid=2-s2.0-4143138886&partnerID=MN8TOARS.
  212. Pelayo, F.; Martínez, A.; Morillas, C.A.; Romero, S.; Sousa, L.; Tomás, P.. "Retina-like processing and coding platform for cortical neuro-stimulation". Annual International Conference of the IEEE Engineering in Medicine and Biology - Proceedings 3 (2003): 2023-2026. http://www.scopus.com/inward/record.url?eid=2-s2.0-1542649546&partnerID=MN8TOARS.
  213. Sousa, L.; Tomás, P.; Pelayo, F.; Martinez, A.; Morillas, C.A.; Romero, S.. "A FPL bioinspired visual encoding system to stimulate cortical neurons in real-time". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2778 (2003): 691-700. http://www.scopus.com/inward/record.url?eid=2-s2.0-35248851589&partnerID=MN8TOARS.
  214. Sousa, L.A.. "Algorithm for modulo (2n + 1) multiplication". Electronics Letters 39 9 (2003): 752-754. http://www.scopus.com/inward/record.url?eid=2-s2.0-0038734409&partnerID=MN8TOARS.
    10.1049/el:20030467
  215. Sinnen, O.; Sousa, L.. "Experimental Evaluation of Task Scheduling Accuracy: Implications for the Scheduling Model". IEICE Transactions on Information and Systems E86-D 9 (2003): 1620-1627. http://www.scopus.com/inward/record.url?eid=2-s2.0-1642360785&partnerID=MN8TOARS.
  216. Roma, N.; Dias, T.; Sousa, L.. "Customisable core-based architectures for real-time motion estimation on FPGAs". Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2778 (2003): 745-754. http://www.scopus.com/inward/record.url?eid=2-s2.0-35248814415&partnerID=MN8TOARS.
  217. Roma, N.; Sousa, L.. "Automatic synthesis of motion estimation processors based on a new class of hardware architectures". Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 34 3 (2003): 277-290. http://www.scopus.com/inward/record.url?eid=2-s2.0-0038353880&partnerID=MN8TOARS.
    10.1023/A:1023204620405
  218. Roma, N.; Sousa, L.. "Fast transcoding architectures for insertion of non-regular shaped objects in the compressed DCT-domain". Signal Processing: Image Communication 18 8 SPEC. (2003): 659-683. http://www.scopus.com/inward/record.url?eid=2-s2.0-0042328300&partnerID=MN8TOARS.
    10.1016/S0923-5965(03)00058-4
  219. Roma, N.; Sousa, L.. "Efficient and configurable full-search block-matching processors". IEEE Transactions on Circuits and Systems for Video Technology 12 12 (2002): 1160-1167. http://www.scopus.com/inward/record.url?eid=2-s2.0-0036995762&partnerID=MN8TOARS.
    10.1109/TCSVT.2002.806818
  220. Roma, N.; Sousa, L.. "Parameterizable hardware architectures for automatic synthesis of motion estimation processors". IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation (2001): 428-439. http://www.scopus.com/inward/record.url?eid=2-s2.0-0035157418&partnerID=MN8TOARS.
  221. Roma, Nuno; Sousa, Leonel. "In the development and evaluation of specialized processors for computing high-order 2-D image moments in real-time". Computer Architectures for Machine Perception, Proceedings (CAMP) (2000): 170-179. http://www.scopus.com/inward/record.url?eid=2-s2.0-0033696905&partnerID=MN8TOARS.
  222. Sousa, L.A.. "General method for eliminating redundant computations in video coding". Electronics Letters 36 4 (2000): 306-307. http://www.scopus.com/inward/record.url?eid=2-s2.0-0033907536&partnerID=MN8TOARS.
    10.1049/el:20000272
  223. Sousa, Leonel Augusto. "Applying conditional processing to design low-power array processors for motion estimation". IEEE International Conference on Image Processing 2 (1999): 769-773. http://www.scopus.com/inward/record.url?eid=2-s2.0-0033326461&partnerID=MN8TOARS.
  224. Sousa, L.A.. "Bidirectional systolic arrays for digital recursive filters". Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems 3 (1998): 499-502. http://www.scopus.com/inward/record.url?eid=2-s2.0-0032271510&partnerID=MN8TOARS.
  225. Sousa, L.A.; Piedade, M.S.. "New orthogonal multiprocessor and its application to image processing". Proceedings of the International Conference on High Performance Computing, HiPC (1997): 511-516. http://www.scopus.com/inward/record.url?eid=2-s2.0-0031374346&partnerID=MN8TOARS.
  226. Sousa, Leonel; Caeiro, Jose; Piedade, Moises. "An advanced architecture for image processing and analysis". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1991): 77-80. http://www.scopus.com/inward/record.url?eid=2-s2.0-0026394063&partnerID=MN8TOARS.
  227. Sousa, Leonel A.; Piedade, Moises S.; Caeiro, JoseJ.. "A high performance image processing system". Proceedings - IEEE International Symposium on Circuits and Systems 1 (1990): 751-754. http://www.scopus.com/inward/record.url?eid=2-s2.0-0025664186&partnerID=MN8TOARS.
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2015/06/01 - 2019/12/20 Arithmetic and Algorithms for Emerging Cryptography
Supervisor of Paulo Sérgio Alves Martins
Universidade de Lisboa Instituto Superior Técnico, Portugal
2014/01/02 - 2018/12/24 GHEVC: An Efficient HEVC Decoder for Graphics Processing Units
Supervisor of Diego Felix de Souza
Universidade de Lisboa Instituto Superior Técnico, Portugal
2012/01/03 - 2016/07/27 Exploiting parallel heterogeneous systems for scientific computations
Co-supervisor of Lidia Kuan
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011/01/04 - 2015/07/30 Residue Number Systems - Efficient Architectures and Circuits
Co-supervisor of Pedro Miguel Florindo Miguens Matutino
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011/01/04 - 2015/06 High performance and scalable unified architectures for transform and quantization in H.264/AVC video codecs
Co-supervisor of Tiago M Dias
Universidade de Lisboa Instituto Superior Técnico, Portugal
2009/10/06 - 2014/02/28 Heterogeneous Systems: Load Balancing and Performance Modeling
Supervisor of Aleksandar Ilic
Universidade de Lisboa Instituto Superior Técnico, Portugal
2009/12/01 - 2013/12/23 High-performance and Embedded Systems for Cryptography
Supervisor of Samuel Freitas Antão
Universidade de Lisboa Instituto Superior Técnico, Portugal
2008/12/01 - 2013/12 Computational Models, Neuronal Metrics and System Identification in Bioelectronic Vision
Supervisor of João Carlos Silva Martins
Universidade de Lisboa Instituto Superior Técnico, Portugal
2008/12/01 - 2012/12/21 Stream-based computing and fine-grained parallelism: From algorithms to reconfigurable hardware
Supervisor of Frederico Pratas
Universidade de Lisboa Instituto Superior Técnico, Portugal
2006/09/04 - 2011/12/06 Parallel Algorithms and Architectures for LDPC Decoding
Supervisor of Gabriel Falcão
Universidade de Coimbra Faculdade de Ciencias e Tecnologia, Portugal
2007/01/04 - 2011/11/02 A Hand-held Microsystem for Biological Analysis: Electronics, Signal Acquisition and Processing for Information Extraction
Supervisor of José Germano
Universidade de Lisboa Instituto Superior Técnico, Portugal
2007/01/04 - 2011/07/29 Optimized Digital Clock and Data Recovery Architectures
Supervisor of José Angelo Rebelo Sarmento
Universidade de Lisboa Instituto Superior Técnico, Portugal
2007/01/04 - 2011/06/05 Parallel Video Coding on Multi-Core Platforms
Supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2005/01/03 - 2009/03/04 Neural Code: Tunning and Assessment of Retina Models
Supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2004/01/05 - 2008/05/30 Transform Domain Transcoding Systems for Static and Dynamic Video Composition
Supervisor of Nuno Roma
Universidade de Lisboa Instituto Superior Técnico, Portugal
2003/01/06 - 2007/12/21 Secure Computing on Reconfigurable Systems
Supervisor of Ricardo Chaves
Universidade de Lisboa Instituto Superior Técnico, Portugal
1998/12/07 - 2003/12/19 Accurate Task Scheduling for Parallel Systems
Supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
Distinctions

Award

2022 Prémios Científicos Universidade de Lisboa/Caixa Geral de Depósitos, áreas de Engenharia Eletrotécnica e Engenharia Aeroespacial (Aviónica)
Universidade de Lisboa, Portugal

Caixa Geral de Depositos, Portugal
2020 IEEE Transactions on Computers Award for Editorial Service and Excellence for the role as Associate Editor
IEEE Computer Society, United States
2020 Best Paper Award Runner-up IEEE Intern. Parallel & Distributed Processing Symposium (IPDPS)
IEEE Computer Society, United States
2017 Best Associate Editor IEEE Transactions on Circuits and Systems for Video Technology
IEEE, United States

Title

2015 ACM Distinguished Scientist (members who have made outstanding contributions to the computing field)

Other distinction

2020 Appointed Senior Associate Editor of the Journal on Emerging and Selected Topics in Circuits and Systems
IEEE Circuits and Systems Society, United States
2018 Appointed Associate Editor of the Transactions on Computers
IEEE Computer Society, United States
2016 Honorable mention for the number and the impact of the publications (2011-15)
2016 Elected to the Technical Committee on Design and Implementation of Signal Processing Systems (DISPS TC)
IEEE, United States
2015 Appointed Associated Editor of the Electronics Letters
Institute of Engineering and Technology, India
2014 Elected to the IEEE Technical Committee on VLSI Systems & Applications (VSA-TC)
IEEE, United States
2014 Appointed Associated Editor of the Transactions on Multimedia
IEEE, United States
2014 Appointed Associated Editor of the Transactions on Circuits and Systems for Video Technology
IEEE, United States
2014 Appointed Editor-in-Chief of the Journal on Embedded Systems
2013 Fellow of the IET
2013 Best Paper Award
2013 HiPEAC Award for the paper "Accelerating the Computation of Induced Dipoles for Molecular Mechanics with Dataflow Engines", IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'13), Seattle, Washington, Abril de 2013
2013 Appointed Associated Editor of the Journal of Real-Time Image Processing (JRTIP)
2011 Stamatis Vassiliadis' Best Paper Award
2010 Best Poster Award
2009 HiPEAC Award for the paper "Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices", IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'09), Napa, California, Abril de 2009
2009 Honorable mention for the number and the impact of the publications (2004-08)
2009 Best INESC-ID Researcher (2008-2009)
2009 Elevated to Senior Member
2007 Honorable mention for the number and the impact of the publications (2002-06)
2006 Co-author of one of the best student papers in 2004 (paper in IEEE ICC'04)
2004 Award Prof. Luís Vidigal, supervisor of the best final year graduation work in ECE and ICT at IST
2003 Senior member - professional recognition for technical and professional excellence