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Nuno Neves. Completed the PhD in Programa Doutoral em Engenharia Electrotécnica e de Computadores in 2019 by Universidade de Lisboa Instituto Superior Técnico and MSc in Mestrado Integrado em Engenharia Electrotécnica e de Computadores in 2013 by Universidade de Lisboa Instituto Superior Técnico. Is Invited Auxiliary Researcher in Universidade de Lisboa Instituto Superior Técnico. Published 7 articles in journals. Has 1 section(s) of books. Organized 1 event(s). Participated in 2 event(s). Supervised 4 MSc dissertation(s) e co-supervised 6. Has received 6 awards and/or honors. Participates and/or participated as Master Student Fellow in 2 project(s), Research Fellow in 1 project(s) and Researcher in 5 project(s). Works in the area(s) of Engineering and Technology with emphasis on Electrotechnical Engineering, Electronics and Informatics with emphasis on Computer Hardware and Architecture and Engineering and Technology with emphasis on Electrotechnical Engineering, Electronics and Informatics. In his curriculum Ciência Vitae the most frequent terms in the context of scientific, technological and artistic-cultural output are: Domain-Specific Architectures and Accelerators; Reconfigurable Hardware; Stream Computing; Data Prefetching; Application Characterization; Compiler-driven Execution; Compiler Static Analysis and Optimization.
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Identification

Personal identification

Full name
Nuno Neves

Citation names

  • Neves, Nuno

Author identifiers

Ciência ID
571C-AC11-3015
ORCID iD
0000-0003-0628-2259

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Computer Hardware and Architecture
  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics

Languages

Language Speaking Reading Writing Listening Peer-review
English Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1)
Portuguese Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1)
Spanish; Castilian Beginner (A1) Beginner (A1) Beginner (A1) Beginner (A1)
Education
Degree Classification
2019/01/08
Concluded
 Programa Doutoral em Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Energy-Efficient Computing: Adaptive Structures and Data Management" (THESIS/DISSERTATION)
 Pass with Distinction
2017
Concluded
 GUE Cave Diver Level 2 (Outros)
GUE Global Underwater Explorers, United States
2013
Concluded
 Mestrado Integrado em Engenharia Electrotécnica e de Computadores (Mestrado)
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Multi-Core SIMD ASIP for DNA Sequence Alignment" (THESIS/DISSERTATION)
 16
2013
Concluded
 Advanced Open Water Diver (Outros)
SSI Scuba Schools International, United States
Affiliation

Science

Category
Host institution 		Employer
2021/12/01 - Current Invited Auxiliary Researcher (Research) Universidade de Lisboa Instituto Superior Técnico, Portugal
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020/07/01 - Current Researcher (Research) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2020/07/01 - 2021/11/30 Contracted Researcher (Research) IT - Coimbra, Portugal
2019/03/25 - 2020/06/30 Contracted Researcher (Research) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Others

Category
Host institution 		Employer
2019/02/01 - 2019/07/31 Invited Assistant Professor in the Department of Electrical and Computer Engineering, lecturing the course of Computer Architectures. Universidade de Lisboa Instituto Superior Técnico, Portugal
2017/09/01 - 2019/02/01 Teaching Assistant (TA) in the Department of Electrical and Computer Engineering, lecturing the courses of Algorithms and Data Structures and Computer Architectures. Universidade de Lisboa Instituto Superior Técnico, Portugal
2014/09/01 - 2015/07/01 Teaching Assistant (TA) in the Department of Electrical and Computer Engineering, lecturing the courses of Algorithms and Data Structures and Programming Universidade de Lisboa Instituto Superior Técnico, Portugal
2014/02/07 - 2014/12/31 Research Fellowship in the project THReads (PTDC/EEA-ELC/117329/2010) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2012/09/15 - 2013/12/31 Research Fellowship in the projects HELIX (PTDC/EEAELC/113999/2009b) and THReads (PTDC/EEA-ELC/117329/2010) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2011/11/01 - 2012/09/14 Trainee of the Signal Processing Systems (SiPS) group, in project HELIX (PTDC/EEAELC/113999/2009b) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2011/04/01 - 2011/06/30 Student Research Fellow in the project Aristos (PTDC/EIA-EIA/102496/2008) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
Projects

Grant

Designation Funders
2019/04 - Current HPVC: High Performance Video Coding with Massive Parallelism in GPUs and Approximate Computing
FCT-CAPES 2019-2020
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior
Ongoing
2012/03 - 2015/02 THREadS: Multitask System Framework with Transparent Hardware Reconfiguration
Provided by PTCRIS: 117329
117329
Research Fellow
Fundação para a Ciência e a Tecnologia, I.P.
2011/01 - 2013/12 HELIX: Heterogeneous Multi-Core Architecture for Biological Sequence Analysis
Provided by PTCRIS: 113999
113999
Master Student Fellow
Fundação para a Ciência e a Tecnologia, I.P.
2010/01 - 2012/12 ARISTOS: Autonomic ReplicatIon of Software TransactiOnal memorieS
102496
Provided by PTCRIS: 102496
Master Student Fellow
Fundação para a Ciência e a Tecnologia, I.P.

Contract

Designation Funders
2021/12/01 - Current SGA2 (Specific Grant Agreement 2) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI)
101036168
Researcher
European Commission
Ongoing
2023/03/10 - 2026/03/09 Compilation Abstraction and Hardware Adaptation for Specialized and General-Purpose Computing Unification
2022.06780.PTDC
10.54499/2022.06780.PTDC
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto de Telecomunicações Lisboa, Portugal

Instituto de Engenharia de Sistemas e Computadores Tecnologia e Ciência, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2023/03/10 - 2024/09/09 Accelerator Framework for Real-Time 3D Reconstruction of Underwater Caves
2022.04020.PTDC
10.54499/2022.04020.PTDC
Principal investigator
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Universidade de Lisboa Instituto de Sistemas e Robótica, Portugal
Fundação para a Ciência e a Tecnologia
Ongoing
2019/03/25 - 2021/11/30 HAnDLE: Hardware Accelerated Deep Learning Framework
PTDC/EEI-HAC/30485/2017
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Ongoing
2012/03/01 - 2015/08/31 THREadS: Framework para Sistemas Multi-Tarefa com Reconfiguração Transparente de Hardware
PTDC/EEA-ELC/117329/2010
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded

Other

Designation Funders
2020 - Current HiPErBio: High Performance and Energy-efficient Processing for Bioinformatics Applications in Emergent Heterogeneous Systems
PTDC/CCICOM/31901/2017
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Ongoing
2020 - 2021/12/31 SGA1 (Specific Grant Agreement 1) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI)
info:eu-repo/grantAgreement/EC/H2020/826647/EU
Researcher
Universidade de Lisboa Instituto Superior Técnico, Portugal
 European Commission
Concluded
Outputs

Publications

Book chapter
  1. Neves, Nuno. "In-Cache Streaming: Morphable Infrastructure for Many-Core Processing Systems". 775-787. Springer International Publishing, 2017.
    10.1007/978-3-319-58943-5_62
Conference paper
  1. Fernandes, Ana; Neves, Nuno; Crespo, Luís; Tomás, Pedro; Roma, Nuno; Falcao, Gabriel. Corresponding author: Fernandes, Ana. "A functional validation framework for the Unlimited Vector Extension". Paper presented in CAMS 2023 - The 1st Workshop on Computer Architecture Modeling and Simulation, Toronto, 2023.
  2. Luís Crespo; Pedro Tomás; Nuno Roma; Nuno Neves. "Trading Performance, Power, and Area on Low-Precision Posit MAC Units for CNN Training". 2023.
    10.1109/sbac-pad59825.2023.00014
  3. Joao Mario Domingos; Tiago Rocha; Nuno Neves; Nuno Roma; Pedro Tomás; Leonel Sousa. "Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools". 2023.
    10.1109/asap57973.2023.00027
  4. Joao Mario Domingos; Nuno Neves; Nuno Roma; Pedro Tomas. "Unlimited Vector Extension with Data Streaming Support". 2021.
    10.1109/isca52012.2021.00025
  5. Ribeiro, Gaspar; Neves, Nuno; Santander-Jimenez, Sergio; Ilic, Aleksandar. "HEDAcc: FPGA-based Accelerator for High-order Epistasis Detection". 2021.
    10.1109/fccm51124.2021.00022
  6. Neves, Nuno; Tomas, Pedro; Roma, Nuno. "Dynamic Fused Multiply-Accumulate Posit Unit with Variable Exponent Size for Low-Precision DSP Applications". 2020.
    10.1109/sips50750.2020.9195256
  7. Neves, Nuno; Tomas, Pedro; Roma, Nuno. "Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic". 2020.
    10.1109/asap49362.2020.00033
  8. Nuno Neves; Pedro Tomas; Nuno Roma. "Efficient data-stream management for shared-memory many-core systems". 2015.
    10.1109/fpl.2015.7293960
  9. Nuno Neves; Nuno Sebastiao; Andre Patricio; David Matos; Pedro Tomas; Paulo Flores; Nuno Roma. "BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment". 2013.
    10.1109/asap.2013.6567581
Journal article
  1. Nuno Neves; Joao Mario Domingos; Nuno Roma; Pedro Tomas; Gabriel Falcao. "Compiling for Vector Extensions With Stream-Based Specialization". IEEE Micro (2022): https://doi.org/10.1109/MM.2022.3173405.
    10.1109/MM.2022.3173405
  2. Luis Crespo; Pedro Tomás; Nuno Roma; Nuno Neves. "Unified Posit/IEEE-754 Vector Mac Unit for Transprecision Computing". IEEE Transactions on Circuits and Systems II: Express Briefs (2022):
    Accepted • 10.1109/TCSII.2022.3160191
  3. Nuno Neves; Pedro Tomás; Nuno Roma. "A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming". Journal of Signal Processing Systems (2021): https://doi.org/10.1007/s11265-021-01687-7.
    10.1007/s11265-021-01687-7
  4. Neves, Nuno; Tomas, Pedro; Roma, Nuno. "Compiler-Assisted Data Streaming for Regular Code Structures". IEEE Transactions on Computers 70 3 (2021): 483-494. http://dx.doi.org/10.1109/tc.2020.2990302.
    10.1109/tc.2020.2990302
  5. Nuno Neves; Pedro Tomás; Nuno Roma. "Stream data prefetcher for the GPU memory interface". The Journal of Supercomputing 74 6 (2018): 2314-2328. https://doi.org/10.1007/s11227-018-2260-6.
    10.1007/s11227-018-2260-6
  6. Nuno Neves; Pedro Tomas; Nuno Roma. "Adaptive In-Cache Streaming for Efficient Data Management". IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 7 (2017): 2130-2143. https://doi.org/10.1109%2Ftvlsi.2017.2671405.
    10.1109/TVLSI.2017.2671405
  7. Nuno Neves; Rui Neves; Nuno Horta; Pedro Tomás; Nuno Roma. "Multi-objective kernel mapping and scheduling for morphable many-core architectures". Expert Systems with Applications 45 (2016): 385-399. http://dx.doi.org/10.1016/j.eswa.2015.10.004.
    10.1016/j.eswa.2015.10.004
  8. Neves, Nuno. "Morphable hundred-core heterogeneous architecture for energy-aware computation". IET Computers & Digital Techniques (2014):
    10.1049/iet-cdt.2014.0078
  9. Nuno Neves; Nuno Sebastiao; David Matos; Pedro Tomas; Paulo Flores; Nuno Roma. "Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms". IEEE Trans. VLSI Syst. (2014): 1-1. http://dx.doi.org/10.1109/tvlsi.2014.2333757.
    10.1109/tvlsi.2014.2333757
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2023/09 - Current Novel RISC-V Extension for Data Streaming Complex Patterns
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current Reconfigurable Architectures for Neural-Network Accelerators with Data-Streaming Support
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current Dynamically Reconfigurable Floating-Point Arithmetic Unit for Next-Generation Processors and Accelerators
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current FPGA-based Accelerator for Real-Time 3D Mapping of Underwater Caves
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current Runtime-Adaptable Cache Architecture for Application Acceleration in Modern Processors
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current Speech Recognition on the Edge with Binary Neural Networks
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 - Current Highly Performant Underwater SLAM-Based 3D Reconstruction Architectures
Supervisor
 Engenharia Electrotécnica (PhD)
Universidade de Coimbra, Portugal
2023/03 - Current Compiler-driven Hardware Adaptation Towards General-Purpose Computing Acceleration
Supervisor
 Engenharia Electrotécnica e de Computadores (PhD)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - Current Developing the New MACSec Standard on Reconfigurable Devices
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - Current Data-Streaming Support on Gemmini Tensor Architecture
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - Current Reconfigurable Accelerator for High-Order Epistasis Detection
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2021 - Current BioFPGA: Specialized Architecture for High-Order Epistasis Detection
Supervisor
 Engenharia Eletrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/03 - 2024/02 Unlimited Vector Extension Support for RISC-V Simulators
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Coimbra, Portugal
2022/09 - 2023/11 Boosting VeraCrypt with Dedicated Cypher Machines
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - 2023/11 RISC-V Vector and Streaming Extensions Support on Spike Simulator
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - 2023/11 Empowering RISC-V Processor Architectures with Efficient Data-Streaming Mechanisms
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - 2023/11 Enabling Processor Co-Design Through Micro-benchmarking and Performance Monitoring
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2021 - 2021 LLVM Backend Support for Data Streaming Extensions
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2021 - 2021 Vector Multiply-Accumulate Unit for Transprecision Computing
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020 - 2021 FPGA-Based Accelerator for High-Order Epistasis Detection
Supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020 - 2021 RISC-V Processing System with Streaming Support
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019 - 2020 Unlimited Vector Extension with Data Streaming Support
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2017 - 2017 Exploitation of Data-Flow Parallelism and Stream Processing Paradigms within Reconfigurable Processor Architectures
Co-supervisor
 Master of Engineering in Electrical and Electronic Engineering (Scientific initiation)
Université Paris-Saclay, France

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2016 - 2016 Multiplexed Data-Stream Prefetcher
Co-supervisor
 Master of Engineering in Electrical and Electronic Engineering (Scientific initiation)
Université Paris-Saclay, France

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2015 - 2015 Data-Streaming Communication Infrastructure for Many-Core Accelerators
Co-supervisor
 Master of Engineering in Electrical and Electronic Engineering (Scientific initiation)
Université Paris-Saclay, France

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2015 - 2015 Morphable Cache Memory Structure for Data-Streaming Applications
Co-supervisor
 Master of Engineering in Electrical and Electronic Engineering (Scientific initiation)
Université Paris-Saclay, France

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2014 - 2015 Compilation of OpenCL Programs for Stream Processing Architectures
Co-supervisor
 Engenharia Informática e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2013 - 2014 Swinger: Processor Re-Allocation on Dynamically Reconfigurable FPGAs
Co-supervisor
 Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2013 - 2014 Implementation of OpenMP on Application-Specific Architectures
Co-supervisor
 Engenharia Informática e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal

Event organisation

Event name
Type of event (Role) 		Institution / Organization
2021 - 2021 Artifact Evaluation Chair and Local Committee Member in the 27th International European Conference on Parallel and Distributed Computing (Euro-Par) (2021 - 2021)
Conference (Member of the Organising Committee)

Event participation

Activity description
Type of event 		Event name
Institution / Organization
2022 - 2022 Review Committee Member
Conference
 International Conference on Artificial Intelligence Circuits and Systems (AICAS 2022)
2018 - 2018 Program Committee Member for Artifact Evaluation
Conference
 International Conference on Parallel Architectures and Compilation Techniques

Jury of academic degree

Topic
Role 		Candidate name (Type of degree)
Institution / Organization
2024/04/18 Designing an Instruction Set Based Coarse Grain Accelerator
(Thesis) Main arguer
 Gonçalo Ferreira (Master)
Universidade do Porto Faculdade de Engenharia, Portugal
2024/02 Dynamically reconfigurable floating-point arithmetic unit for next-generation processors and accelerators (2nd Cycle Integrated Project)
Supervisor
 Guilherme Dias (Other)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2024/02 Speech Recognition on the Edge with Binary Neural Networks (2nd Cycle Integrated Project)
(Thesis) Main arguer
 Frederico Santos (Other)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2024/02 FPGA-based Accelerator for Real-Time 3D Mapping of Underwater Caves (2nd Cycle Integrated Project)
Supervisor
 André Costa (Other)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2023/09 Highly Performant Underwater SLAM-Based 3D Reconstruction Architectures (PhD Project Proposal)
Supervisor
 Hamid Moghadaspour (Other)
Universidade de Coimbra, Portugal
2021/12 LLVM Backend Support for Data Streaming Extensions
Supervisor
 Tiago Cardoso Pires (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019/09 Laboratório Portátil
(Thesis) Main arguer
 Pedro Marques Perdigão (Other)
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Committee member

Activity description
Role 		Institution / Organization
2023 - 2023 Program Committee Member at the International Conference on Computer Design (ICCD’2023)
Member

Conference scientific committee

Conference name Conference host
2023 - 2023 International Conference on Application-specific Systems, Architectures and Processors
2023 - 2023 International Symposium on Computer Arithmetic
2023 - 2023 Design, Automation and Test in Europe Conference
2023 - 2023 International Conference on Field-Programmable Logic and Applications
2023 - 2023 International European Conference on Parallel and Distributed Computing
2023 - 2023 International Symposium on Circuits and Systems
2023 - 2023 International Conference on Computer Design
2022 - 2022 International Conference on Acoustics, Speech and Signal Processing
2022 - 2022 International Conference on Parallel, Distributed and Network-based Processing
2022 - 2022 Design, Automation and Test in Europe Conference
2022 - 2022 Workshop on Design and Architectures for Signal and Image Processing
2022 - 2022 International Conference on Application-specific Systems, Architectures and Processors
2022 - 2022 International Conference on Field-Programmable Logic and Applications
2022 - 2022 International Symposium on Circuits and Systems
2022 - 2022 International Symposium on Computer Architecture and High-Performance Computing
2021 - 2022 Workshop on Design and Architectures for Signal and Image Processing (DASIP)
2019 - 2022 International Symposium on Circuits and Systems
2021 - 2021 Design, Automation and Test in Europe Conference
2020 - 2021 International Workshop on Signal Processing Systems
2016 - 2021 International Conference on Architecture of Computing Systems
2015 - 2021 International European Conference on Parallel and Distributed Computing
2014 - 2021 Euromicro Conference on Digital System Design
2020 - 2020 International Conference on Field-Programmable Logic and Applications
2017 - 2020 International Symposium on Computer Architecture and High-Performance Computing
2019 - 2019 International Conference on High Performance Computing & Simulation
2019 - 2019 Symposium on Integrated Circuits and Systems Design
2018 - 2018 International Workshop on Optimization Issues in Energy Efficient HPC & Distributed Systems
2015 - 2018 International Conference on Computing Frontiers
2017 - 2017 International Conference on High Performance Computing, Data, and Analytics
2017 - 2017 Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures, Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms
2015 - 2015 International Conference on Multimedia Big Data
2015 - 2015 International Conference on Computer Design
2015 - 2015 International Symposium on Parallel and Distributed Computing
2014 - 2014 International Conference on Reconfigurable Computing and FPGAs

Course / Discipline taught

Academic session Degree Subject (Type) Institution / Organization
2019/03 - 2019/07 Arquitectura de Computadores Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal
2018/09 - 2019/02 Algoritmos e Estrutura de Dados Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal
2018/03 - 2018/07 Arquitectura de Computadores Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal
2017/09 - 2018/02 Algoritmos e Estrutura de Dados Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal
2015/03 - 2015/07 Programação Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal
2014/09 - 2015/02 Algoritmos e Estrutura de Dados Engenharia Electrotécnica e de Computadores (Mestrado integrado) Universidade de Lisboa Instituto Superior Técnico, Portugal

Journal scientific committee

Journal title (ISSN) Publisher
2021 - 2022 IEEE Transactions on Emerging Topics in Computing IEEE
2021 - 2022 Security and Communication Networks Hindawi
2020 - 2020 IEEE Journal of Solid-State Circuits IEEE
2020 - 2020 IEEE Journal on Emerging and Selected Topics in Circuits and Systems IEEE
2020 - 2020 IEEE Access IEEE
2018 - 2020 IEEE Transactions on Computers IEEE
2019 - 2019 IEEE Transactions on Circuits and Systems for Video Technology IEEE
Distinctions

Award

2023 Best Paper Candidate
2021 Best Paper Candidate
2021 HiPEAC Paper Award
HiPEAC Network, Belgium
2016 Best Paper Award
2013 Prémio Prof. Luís Vidigal 2013
Universidade de Lisboa Instituto Superior Técnico, Portugal

Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Other distinction

2019 Excellence in Teaching
2015 Excellence in Teaching
Universidade de Lisboa Instituto Superior Técnico, Portugal
2015 Excellence in Teaching