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Identification

Personal identification

Full name
Tiago Miguel Braga da Silva Dias
Gender
Male

Citation names

  • Dias, Tiago
  • Dias, T
  • Tiago Dias
  • Tiago M Dias

Author identifiers

Ciência ID
E21C-1E42-EE73
ORCID iD
0000-0001-7445-5823
Google Scholar ID
0w8TzzAAAAAJ
Researcher Id
H-4265-2011
Scopus Author Id
11540058800

Email addresses

  • tiago.dias@inesc-id.pt (Professional)
  • tiago.dias@isel.pt (Professional)

Telephones

Telephone
  • 213100300 Ext.: 2394 (Professional)
  • (+351) 218317180 (Professional)

Addresses

  • INESC-ID. Rua Alves Redol, 9, 1000-029, Lisboa, Lisboa, Portugal (Professional)
  • ISEL - DEETC, Rua Conselheiro Emídio Navarro, 1, 1959-007, Lisboa, Lisboa, Portugal (Professional)

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Computer Hardware and Architecture

Languages

Language Speaking Reading Writing Listening Peer-review
Portuguese (Mother tongue)
English Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1)
Spanish; Castilian Intermediate (B1) Intermediate (B1) Beginner (A1) Intermediate (B1)
French Beginner (A1) Intermediate (B1) Beginner (A1) Beginner (A1)
Education
Degree Classification
2015/06
Concluded
 Engenharia Electrotécnica e de Computadores (Doutoramento)
Universidade de Lisboa Instituto Superior Técnico, Portugal
"High performance and scalable unified architectures for transform and quantization in H.264/AVC codecs" (THESIS/DISSERTATION)
 Aprovado com Muito Bom
2004
Concluded
 Mestrado em Engenharia Electrotécnica e de Computadores (Mestrado)
Major in Sistemas Electrónicos
Universidade de Lisboa Instituto Superior Técnico, Portugal
"High-Performance VLSI Motion Estimation Processors: Data Reuse and Sub-Pixel Accuracy" (THESIS/DISSERTATION)
 Good
2002
Concluded
 Engenharia Electrotécnica e de Computadores (Licenciatura)
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Co-processador reconfigurável para processamento de sinal (Descodificador de vídeo)" (THESIS/DISSERTATION)
 15 (in a 0-20 scale)
Affiliation

Science

Category
Host institution 		Employer
2002/09/01 - Current Researcher (Research) Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2012/06 - 2012/07 Visiting Researcher (Research) Universidad de Las Palmas de Gran Canaria - Campus de Tafira, Spain
Universidad de Las Palmas de Gran Canaria - Instituto Universitario de Microelectrónica Aplicada , Spain
2010/09 - 2010/12 Visiting Researcher (Research) Universidad de Las Palmas de Gran Canaria - Campus de Tafira, Spain
Universidad de Las Palmas de Gran Canaria - Instituto Universitario de Microelectrónica Aplicada , Spain

Teaching in Higher Education

Category
Host institution 		Employer
2024/07/01 - Current Teacher Coordinator (Polytechnic Teacher) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2015/06 - 2024/06/30 Adjunct Teacher (Polytechnic Teacher) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2004/12/01 - 2015/06 Invited Assistant (Polytechnic Teacher) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2003/11 - 2004/12 Invited Assistant (Polytechnic Teacher) Escola Superior Náutica Infante D Henrique, Portugal
Escola Superior Náutica Infante D Henrique, Portugal
2002/09 - 2003/03 Tutor (University Teacher) Universidade de Lisboa Instituto Superior Técnico, Portugal
Universidade de Lisboa Instituto Superior Técnico, Portugal

Others

Category
Host institution 		Employer
2021/10/06 - Current Conselho de Representantes Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2018/05 - 2021/10/06 Conselho científico/técnico-científico ou orgão correspondente Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
Projects

Grant

Designation Funders
2008/10/01 - 2009/08/31 ANY-CORE MEMORY-CENTRIC ARCHITECTURE FOR ADVANCED VIDEO CODING
SFRH/BD/43639/2008
 Fundação para a Ciência e a Tecnologia
Concluded

Contract

Designation Funders
2023/03/10 - Current Plataforma de Aceleração para Reconstrução 3D de Grutas Subaquáticas em Tempo-Real
2022.04020.PTDC
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Ongoing
2022 - Current DISCRETION - Disruptive SDN secure communications for European Defense
EDIDP-CSAMN-SDN-202-74-DISCRETION
Researcher
Universidade de Lisboa Instituto Superior Técnico, Portugal
Ongoing
2022 - Current SINCRO 2.0 – Desenvolvimento Estratégico
SINCRO-2.0
Researcher
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
 Autoridade Nacional de Segurança Rodoviária (ANSR)
Ongoing
2019/04 - Current HORUS.BP - Segurança de Abastecimento em Áreas de Serviço
HORUS
Researcher
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
 BP Portugal - Comércio de Combustíveis e Lubrificantes, S.A.
Ongoing
2019/03 - Current SITL IoT: Sistema de Inteligência nos Terminais Logísticos
SITLIOT
Researcher
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
 Agência Nacional de Inovação SA
Ongoing
2019 - Current High Performance Video Coding with Massive Parallelism in GPUs and Approximate Computing (HPVC)
IP01052
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia, I.P.
Ongoing
2020 - 2023 REV@CONSTRUCTION - Digital Construction Revolution
LISBOA-01-0247-FEDER-046123
Researcher
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
 Agência Nacional de Inovação SA
Ongoing
2020 - 2021 SINCRO 2.0
SINCRO-2.0-Assessoria
Researcher
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
 Autoridade Nacional de Segurança Rodoviária (ANSR)
Ongoing
2019/05 - 2020 F3S - Plataforma de apoio ao treino de figuras obrigatórias em patinagem artística
IPL/2019/F3S_ESCS
Researcher
Instituto Politécnico de Lisboa, Portugal
 Instituto Politécnico de Lisboa
Concluded
2014/01 - 2018/01 EMC2: Embedded Multi-core Systems for Mixed Criticality Applications in Dynamic and Changeable Real-Time Environments
ARTEMIS/0003/2013
Researcher
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia, I.P.
Concluded
2012/03/01 - 2015/08/31 THREadS: Framework para Sistemas Multi-Tarefa com Reconfiguração Transparente de Hardware
PTDC/EEA-ELC/117329/2010
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2011/01/01 - 2013/12/31 HELIX: Arquitectura heterogénea com múltiplos núcleos para análise de sequências biológicas
PTDC/EEA-ELC/113999/2009
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2005/01/01 - 2008/11/30 AMEP: Processador Adaptativo para Estimação de Movimento em Dispositivos Autónomos baseados na Norma H.264/AVC
POSC/EEA-CPS/60765/2004
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia
Concluded
2002/01 - 2004/01 COSME: Configurable Structures for Motion Estimation
POSI/CHS/40877/2001
Scientific Initiation Fellow
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
 Fundação para a Ciência e a Tecnologia, I.P.
Concluded
Outputs

Publications

Book
  1. Dias, T.; Roma, N.; Sousa, L.. Low power distance measurement unit for real-time hardware motion estimators. 2006.
  2. Momcilovic, S.; Dias, T.; Roma, N.; Sousa, L.. Application Specific Instruction Set Processor for adaptive video motion estimation. 2006.
Book chapter
  1. Malcata, Tomás; Sebastião, Nuno; Dias, Tiago; Roma, Nuno. "Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes". In Design and Architecture for Signal and Image Processing, 40-52. Springer Nature Switzerland, 2023.
    10.1007/978-3-031-29970-4_4
  2. Gonçalves, Carlos; Osório, A. Luís; Camarinha-Matos, Luís M.; Dias, Tiago; Tavares, José. "A Collaborative Cyber-Physical Microservices Platform – the SITL-IoT Case". In IFIP Advances in Information and Communication Technology, 411-420. France: Springer International Publishing, 2021.
    10.1007/978-3-030-85969-5_38
  3. Osório, A. Luis; Camarinha-Matos, Luis M.; Dias, Tiago; Gonçalves, Carlos; Tavares, José. "Open and Collaborative Micro Services in Digital Transformation". In IFIP Advances in Information and Communication Technology, 393-402. France: Springer International Publishing, 2021.
    10.1007/978-3-030-85969-5_36
  4. Osório, A. Luis; Camarinha-Matos, Luis M.; Dias, Tiago; Tavares, José. "Adaptive Integration of IoT with Informatics Systems for Collaborative Industry: The SITL-IoT Case". In IFIP Advances in Information and Communication Technology, 43-54. Springer International Publishing, 2019.
    10.1007/978-3-030-28464-0_5
  5. Dias, Tiago; Roma, Nuno; Sousa, Leonel. "Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators". In Integrated Circuit and System Design - Power and Timing Modeling, Optimization and Simulation, edited by Vounckx, J.; Azemard, N.; Maurine, P., 247-255. Springer Berlin Heidelberg, 2006.
    Published • 10.1007/11847083_24
  6. Dias, T.; Roma, N.; Sousa, L.. "Low power distance measurement unit for real-time hardware motion estimators". edited by Vounckx, J.; Azemard, N.; Maurine, P., 247-255. 2006.
  7. Nuno Roma; Tiago Miguel Braga da Silva ; Leonel Augusto Pires Seabra de Sousa. "Customizable and Reduced Hardware Motion Estimation Processors". 55-66. Springer-Verlag, 2005.
    10.1007/1-4020-3128-9_5
  8. Roma, N.; Dias, T.; Sousa, L.; Roma, Nuno; Dias, Tiago; Sousa, Leonel. "Customisable core-based architectures for real-time motion estimation on FPGAs". In Field Programmable Logic and Application, edited by Cheung, P. Y. K.; Constantinides, G. A.; DeSousa, J. T., 745-754. Springer Berlin Heidelberg, 2003.
    Published • 10.1007/978-3-540-45234-8_72
Conference paper
  1. José Santos (0009-0009-8982-181X); André Lourenço ( 0000-0001-8935-9578); Tiago M Dias. "Reliability and Security in Wellbeing Monitoring Embedded Systems". Paper presented in 14.º Simpósio de Informática (INForum 2023), Porto, 2023.
  2. Serras, Bruno; Gonçalves, Carlos; Dias, Tiago; Osório, A. Luís. "Monitoring Roadside Traffic Enforcement Equipment within SoT and ISoS Frameworks". Paper presented in 7th International Young Engineers Forum (YEF-ECE), Caparica, 2023.
    Published • 10.1109/yef-ece58420.2023.10209305
  3. Osório, A. Luis; Gonçalves, Carlos; Tiago Dias; Lopes, Carlos. "Sistema Nacional de Gestão de Eventos de Trânsito (SINCRO 2.0)". Paper presented in 10º Congresso Rodoferroviário Português, Lisboa, 2022.
  4. Serras B.; Goncalves C.; Dias T.; Osorio A.L.. "Extending the Synoptics of Things (SoT) Framework to Manage ISoS Technology Landscapes". Paper presented in Proceedings of the 2022 International Young Engineers Forum (YEF-ECE), 2022.
    10.1109/YEF-ECE55092.2022.9849899
  5. Gonçalves C.; Dias T.; Osório A.L.; Camarinha-Matos L.M.. "A Multi-supplier Collaborative Monitoring Framework for Informatics System of Systems". Paper presented in Collaborative Networks in Digitalization and Society 5.0 (PRO-VE 2022), 2022.
    10.1007/978-3-031-14844-6_4
  6. Serras, Bruno; Goncalves, Carlos; Dias, Tiago; Osorio, A. Luis. "Synoptics of Things (SoT): An Open Framework for the Supervision of IoT Devices". Paper presented in 2021 International Young Engineers Forum (YEF-ECE), Lisboa, 2021.
    10.1109/yef-ece52297.2021.9505145
  7. Dias, Tiago; Sampaio, Pedro; Cardoso, Diogo; Prates, Claudio; Jesus, Ricardo; Costa, Tiago. "Open-Source Power Outlet System for IoT-based Smart Homes". Paper presented in 2020 International Conference on Smart Energy Systems and Technologies (SEST), Istanbul, 2020.
    10.1109/SEST48500.2020.9203306
  8. Dias, Tiago; Sampaio, Pedro; Matutino, Pedro Miguens. "A Portable Lab for the Practical Study of Modern Computer Engineering". Paper presented in 2020 XIV Technologies Applied to Electronics Teaching Conference (TAEE), Porto, 2020.
    10.1109/TAEE46915.2020.9163750
  9. Matutino P.M.; Dias T.; Sampaio P.. "Teaching Hardware/Software Co-Design Using a Project-Based Learning Strategy". Paper presented in 2020 XIV Technologies Applied to Electronics Teaching Conference (TAEE), 2020.
    10.1109/TAEE46915.2020.9163759
  10. Rodrigues J.C.; Dias T.; Silva C.; Cavaleiro Rodrigues, José; Dias, T. "Figure follow: A step by step liberating device". Paper presented in Proceedings of the European Conference on the Impact of Artificial Intelligence and Robotics, ECIAIR 2020, Lisboa, 2020.
    10.34190/EAIR.20.039
  11. Tiago Oliveira; André Ramanlal; Tiago Miguel Braga da Silva Dias; Pedro Sampaio. "PDS16inEcplise - An Eclipse Plug-in for the PDS16 Assembly Language". Paper presented in 3rd Conference on Electronics, Telecommunications and Computers (CETC), 2016.
    Published
  12. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Exploiting Coarse-Grained Parallelism in Multi-Transform Architectures for H.264/AVC High Profile Codecs". Paper presented in 2nd Conference on Electronics, Telecommunications and Computers (CETC), 2016.
    Published
  13. Dias T.; Roma N.; Sousa L.. "High performance IP core for HEVC quantization". Paper presented in Proceedings - IEEE International Symposium on Circuits and Systems, 2015.
    10.1109/ISCAS.2015.7169275
  14. Dias, T.; Roma, N.; Sousa, L.. "High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs". Paper presented in Conference on Design and Architectures for Signal and Image Processing, DASIP, Cagliari, 2013.
  15. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Reconfigurable Unified Architecture for Forward and Inverse Quantization in H.264/AVC". Paper presented in VIII Jornadas sobre Sistemas Reconfiguráveis, 2012.
  16. Dias, T.; Rosário, L.; Roma, N.; Sousa, L.. "High performance unified architecture for forward and inverse quantization in H.264/AVC". Paper presented in Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012, 2012.
    10.1109/DSD.2012.73
  17. Dias, T.; Lopez, S.; Roma, N.; Sousa, L.. "High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems". Paper presented in Proceedings - 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2011, 2011.
    10.1109/SAMOS.2011.6045465
  18. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Optimized Forward/Inverse Quantization Unit for H.264/AVC Codecs". Paper presented in Conference on Electronics, Telecommunications and Computers, 2011.
  19. Pedro Matutino; Tiago Miguel Braga da Silva Dias; André Cigarro; Carlos Vitorino; Rogério Mota; M. Graça Lopes; Madalena Barroso; Rui Dores; Francisco Silva. "Embedded data acquisition system for effectiveness of lining systems". Paper presented in Conference on Electronics, Telecommunications and Computers, 2011.
  20. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Efficient and Programmable Processing Unit for H.264/AVC Systolic Unified Transform Engines". Paper presented in VII Jornadas sobre Sistemas Reconfiguráveis, 2011.
    Published
  21. Dias, T.; Roma, N.; Sousa, L.. "H.264/AVC framework for multi-core embedded video encoders". Paper presented in 2010 International Symposium on System-on-Chip Proceedings, SoC 2010, 2010.
    10.1109/ISSOC.2010.5625538
  22. Nuno Sebastião; Tiago Miguel Braga da Silva ; Nuno Roma; Paulo Flores. "Integrated Accelerator Architecture for DNA Sequences Alignment with Enhanced Traceback Phase". Paper presented in Proceedings of the 2010 International Conference on High Performance Computing and Simulation, HPCS 2010, 2010.
    10.1109/HPCS.2010.5547154
  23. Dias, T.; Roma, N.; Sousa, L.. "Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems". 2010.
    10.1109/DASIP.2010.5706271
  24. José Carrilho; Simão Silva; Tiago Miguel Braga da Silva Dias; Nuno Oliveira. "Sistema de vídeo vigilância digital baseado em servidor web multimédia e câmaras IP". Paper presented in 4as Jornadas de Engenharia de Electrónica e Telecomunicações e de Computadores, 2008.
    Published
  25. Pedro Sampaio; Tiago Miguel Braga da Silva Dias. "TCP/IP stack optimized for standalone applications running on ARM7 processors". Paper presented in 4as Jornadas de Engenharia de Electrónica e Telecomunicações e de Computadores, 2008.
    Published
  26. Sebastião, Nuno; Dias, Tiago; Roma, Nuno; Flores, Paulo; Sousa, Leonel. "Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units". Paper presented in 11th Euromicro Conference on Digital System Design, Parma, 2008.
    Published • 10.1109/dsd.2008.66
  27. Nuno Sebastião; Tiago Miguel Braga da Silva Dias; Nuno Roma; Paulo Flores; Leonel Sousa. "Specialized Motion Estimation Processor for Heterogeneous Multicore Video Coding Systems". Paper presented in 4th International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems, 2008.
    Published
  28. Tiago Miguel Braga da Silva ; Nuno Sebastião; Nuno Roma; Paulo Flores; Leonel Augusto Pires Seabra de Sousa. "Programmable IP core for motion estimation: comparison of FPGA and ASIC based implementations". Paper presented in IV Jornadas sobre Sistemas Reconfiguráveis, 2008.
  29. Momcilovic, S.; Dias, T.; Roma, N.; Sousa, L.. "Application Specific Instruction Set Processor for Adaptive Video Motion Estimation". Paper presented in 9th EUROMICRO Conference on Digital System Design (DSD 2006), Cavtat, 2006.
    Published • 10.1109/dsd.2006.25
  30. Momcilovic, S.; Dias, T.; Roma, N.; Sousa, L.. "Application specific instruction set processor for adaptive video motion estimation". 2006.
    10.1109/DSD.2006.25
  31. Dias, T.; Roma, N.; Sousa, L.. "Efficient motion vector refinement architecture for sub-pixel motion estimation systems". Paper presented in IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, 2005.
    10.1109/SIPS.2005.1579885
  32. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Fully Parameterizable VLSI Architecture for Sub-Pixel Motion Estimation with Low Memory Bandwidth Requirements". Paper presented in 3ª Jornadas de Engenharia de Electrónica e Telecomunicações e de Computadores, 2005.
  33. Dias, T.; Roma, N.; Sousa, L.. "Efficient VLSI Architecture for Real-Time Motion Estimation in Advanced Video Coding". Paper presented in 2005 IEEE International SOC Conference, Washington, 2005.
    Published • 10.1109/socc.2005.1554465
  34. Tiago Miguel Braga da Silva Dias; Nuno Roma; Leonel Sousa. "Two-Level Scalable Motion Estimation Architecture with Fractional-Pixel Accuracy and Efficient Data Re-Usage". Paper presented in Jornadas sobre Sistemas Reconfiguráveis, 2005.
  35. Dias, T.; Roma, N.; Sousa, L.. "Efficient VLSI architecture for real-time motion estimation in advanced video coding". 2005.
  36. Nuno Roma; Tiago Miguel Braga da Silva Dias; Leonel Sousa. "Fast Adder Architectures: Modeling and Experimental Evaluation". Paper presented in XVIII Conference on Design of Circuits and Integrated Systems, 2003.
Conference poster
  1. José Santos (0009-0009-8982-181X); André Lourenço ( 0000-0001-8935-9578); Tiago M Dias. "Reliability and Security in Wellbeing Monitoring Embedded Systems". Paper presented in 14.º Simpósio de Informática (INForum 2023), 2023.
Journal article
  1. Saha, Anup; Roma, Nuno; Chavarrías, Miguel; Dias, Tiago; Pescador, Fernando; Aranda, Víctor. "GPU-based parallelisation of a versatile video coding adaptive loop filter in resource-constrained heterogeneous embedded platform". Journal of Real-Time Image Processing 20 3 (2023): http://dx.doi.org/10.1007/s11554-023-01300-z.
    10.1007/s11554-023-01300-z
  2. Dias, T.; Roma, N.; Sousa, L.. "Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs". 2014 1 (2014): 1-15. https://scholar.tecnico.ulisboa.pt/records/OpyFI62i4gaRum2hKqfr2QhW5o9kDsPfleBB.
    10.1186/1687-6180-2014-108
  3. Dias, T.; López, S.; Roma, N.; Sousa, L.. "Scalable unified transform architecture for advanced video coding embedded systems". 41 2 (2013): 236-260. https://scholar.tecnico.ulisboa.pt/records/UYAeVNtqJrpQAtFwY-QZApp8rCCNzCaAmgy9.
    Published • 10.1007/s10766-012-0221-x
  4. Tiago Miguel Braga da Silva Dias; Svetislav Momcilovic; Nuno Roma; Leonel Sousa. "Video Coding Platforms for Mobile Multimedia Networks". 6 6 (2011): 24-26. https://scholar.tecnico.ulisboa.pt/records/EhlYIRIMjLw9_6DD5aBU117cCZCwJIPvaQ_u.
    Published
  5. Dias, T.; López, S.; Roma, N.; Sousa, L.. "A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs". 57 2 (2011): 936-944. https://scholar.tecnico.ulisboa.pt/records/7e608183-152c-485e-85d4-5d000d7d93a3.
    10.1109/TCE.2011.5955243
  6. Tiago Miguel Braga da Silva ; Nuno Roma; Leonel Augusto Pires Seabra de Sousa; Miguel Nuno de Almeida Vasconcelos. "Reconfigurable architectures and processors for real-time video motion estimation". 2 4 (2007): 191-205. https://scholar.tecnico.ulisboa.pt/records/eb530824-3dfe-4c7f-af8f-6be5febf11ae.
    10.1007/s11554-007-0049-6
  7. Tiago Miguel Braga da Silva ; Svetislav ; Nuno Roma; Leonel Augusto Pires Seabra de Sousa. "Adaptive motion estimation processor for autonomous video devices". 2007 57234 (2007): 1-10. https://scholar.tecnico.ulisboa.pt/records/a4a463ef-597e-412b-93c6-dc3b1852cd19.
    10.1155/2007/57234
Activities

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2023 - Current Design and development of oil field prototype based on digital twin technologies and artificial intelligence methods
Co-supervisor
Al-Farabi Kazakh National University, Kazakhstan
2022/09 - Current Developing the new MACSec standard on reconfigurable devices
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - Current Fpga = mem x c^2 - Boosting the internal memory of FPGA with partial reconfiguration
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020/09 - Current Improving Digital Video Broadcasting Channel Switching Delay
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019 - Current Development of a real-time monitoring and forecasting system for forest and steppe fires
Co-supervisor
 Computer Science (PhD)
Al-Farabi Kazakh National University, Kazakhstan
2022/09 - 2023/12 Reliability and security in wellbeing monitoring embedded systems
Co-supervisor
 Mestrado em Engenharia Informática e de Computadores (Master)
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2022/09 - 2023/12 Monitorização de sistemas embebidos para aplicações críticas
Co-supervisor
 Mestrado em Engenharia Informática e de Computadores (Master)
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2022/09 - 2023/11 IP Mangling System for Military Networks
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - 2023/11 Secure military networks, black or red?
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2022/09 - 2023/11 Cryptographic system for military networks
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020/09 - 2022/11 Time-offset compensation for AI-assisted fast channel change on DVB set-top-boxes
Co-supervisor
 Mestrado Bolonha em Engenharia Eletrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019/09 - 2022/02/07 Unicast Assisted System for Fast Channel Change on DVB-C
Co-supervisor
 Mestrado em Engenharia Informática e de Computadores (Master)
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2019/09 - 2021/01 Breaking security of crypto systems using cache side - channel atatck
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2017 - 2018/10 Choosing the Future of Lightweight Encryption Algorithm
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2015 - 2017/05 USD - Ponte USB para SD
Co-supervisor
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2012 - 2014/05 Time constrained multiple-constant-multiplication structures for real-time applications
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2013 - 2014 Sistema de reconhecimento de impressões digitais baseado em FPGA
Co-supervisor
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2012 - 2013/05 Scalable architecture for unified transform coding in embedded MPEG-4 AVC/H.264 video coding systems
Co-supervisor
Universidade de Lisboa Instituto Superior Técnico, Portugal
2011 - 2012 Codificador JPEG baseado em FPGA
Co-supervisor
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2008 - 2008/11 Media player para leitor de CD/DVD com interface IDE
Co-supervisor
 Licenciatura em Engenharia Informática e de Computadores (Degree)
Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2003 - 2004/09 Sistema de aquisição de dados de vento e temperatura
Co-supervisor
Escola Superior Náutica Infante D Henrique, Portugal
2003 - 2004/09 Domus ENIDH
Co-supervisor
Escola Superior Náutica Infante D Henrique, Portugal

Event organisation

Event name
Type of event (Role) 		Institution / Organization
2024/04 - 2024/08 27th Euromicro Conference Series on Digital System Design (DSD) (2024/08/28 - 2024/08/30)
Conference (Member of the Scientific Committee)
2023 - 2024 DASIP 2024 : Workshop on Design and Architectures for Signal and Image Processing (2023/01/17 - 2024/01/19)
Workshop (President of the Organising Committee)
 Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal

Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Università degli Studi di Cagliari, Italy
2023/02 - 2023/06 26th Euromicro Conference Digital System Design - Special Session on Applications, Architectures, Methods and Tools for Machine and Deep Learning (2023/09/06 - 2023/09/08)
Workshop (Member of the Scientific Committee)
2021/12 - 2022/11 23rd IFIP/SOCOLNET Working Conference on Virtual Enterprises (PRO-VE 2022) (2022/09/19 - 2022/09/21)
Conference (Member of the Organising Committee)
 Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2020/11 - 2021/11 27th International European Conference on Parallel and Distributed Computing (Euro-Par'2021) (2021/08/30 - 2021/09/03)
Conference (Member of the Organising Committee)
 Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2017 - 2018 CRYPTACUS - Training School on Cryptanalysis of Ubiquitous Computing Systems (2018/04/16 - 2018/04/20)
Other (Member of the Organising Committee)
 Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2016 - 2016 3rd Conference on Electronics, Telecommunications and Computers (CETC 2016) (2016/12/06 - 2016/12/07)
Conference (Member of the Scientific Committee)
 Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2009 - 2009 8th International Symposium on Parallel and Distributed Computing (ISPDC 2009) (2009/06/30 - 2009/07/04)
Conference (Member of the Organising Committee)
 Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal
2008 - 2008 4as Jornadas de Engenharia de Electrónica e Telecomunicações e de Computadores (JETC) - Scientific Committee (2008)
Conference (Member of the Scientific Committee)
 Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Jury of academic degree

Topic
Role 		Candidate name (Type of degree)
Institution / Organization
2023/03 Contributions to the Efficient Implementation of High-Computational Demanding Video Algorithms over Heterogeneous Platforms
(Thesis) Arguer
 Anup Saha (PhD)
Universidad Politécnica de Madrid Escuela Técnica Superior de Ingenieros de Telecomunicación, Spain
2022/11 Compressed data-streaming mechanisms for big-data application domains
(Thesis) Main arguer
 André Pereira (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2021/07 Secure message exchange system based on a SmartFusion2 SoC and its evaluation as a HSM
(Thesis) Main arguer
 Alexandre Rodrigues (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2021/02 Military cryptographic material manager
(Thesis) Main arguer
 Miguel Viegas (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2020/07 Sistema de monitorização de canais de rega
(Thesis) Main arguer
 Manuel Lameira (Master)
Instituto Politécnico de Beja Escola Superior de Tecnologia e Gestão, Portugal

Course / Discipline taught

Academic session Degree Subject (Type) Institution / Organization
2019/09 - Current Cibersecurity - Lecturing of the module about Hardware Security Engenharia Informática e de Computadores (Mestrado integrado) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2011 - Current Computer Architectures - Lecturing and responsible for the course since 2019 Engenharia Informática e de Computadores (Licenciatura) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2017/09 - 2020/03 Microcontroller Programming - Lecturing and responsible for the course Engenharia Informática e de Computadores (Licenciatura) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal
2007 - 2015 Embedded Systems I - Lecturing Engenharia Informática e de Computadores (Licenciatura) Instituto Politécnico de Lisboa Instituto Superior de Engenharia de Lisboa, Portugal

Evaluation committee

Activity description
Role 		Institution / Organization Funding entity
2017 - 2017 Doctoral external examiner of the thesis submitted by Raúl Celestino Guerra Hernández, entitled "Towards the efficient processing of hyperspectral images : new hardware-friendly algorithms and OpenCL-based implementations" (doi: http://hdl.handle.net/10553/41780)
Evaluator
 Universidad de Las Palmas de Gran Canaria - Instituto Universitario de Microelectrónica Aplicada , Spain
Distinctions

Award

2020 Best Demo Award
XIV Congreso TAEE - Tecnología, Aprendizaje y Enseñanza de la Electrónica, Portugal
2013 Best Paper Award
Conference on Design and Architectures for Signal and Image Processing (DASIP 2013), Italy
2011 The Stamatis Vassiliadis Best Paper Award
11th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI), Greece
2010 Best Poster Award
2010 Conference on Design and Architectures for Signal and Image Processing (DASIP 2010), United Kingdom
2005 Best Paper Award
Jornadas sobre Sistemas Reconfiguráveis (REC 2005), Portugal

Other distinction

2012 Short Term Scientific Mission (STSM)
European Cooperation in Science and Technology, Belgium
2010 HiPEAC collaboration grant
European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC), Belgium
2009 PhD Research Studentship
Fundação para a Ciência e a Tecnologia, I.P., Portugal
2008 PhD Research Studentship
Fundação para a Ciência e a Tecnologia, I.P., Portugal
2002 Scientific Initiation Grant
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento em Lisboa, Portugal