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Ricardo Filipe Sereno Póvoa. Concluiu o(a) Doutoramento em Programa Doutoral em Engenharia Electrotécnica e de Computadores em 2018 pelo(a) Universidade de Lisboa Instituto Superior Técnico e Mestrado em Mestrado Integrado em Engenharia Electrotécnica e de Computadores em 2013 pelo(a) Universidade de Lisboa Instituto Superior Técnico. É Pós-doutorado no(a) Instituto de Telecomunicações. Publicou 14 artigos em revistas especializadas. Possui 1 livro(s).
Identification

Personal identification

Full name
Ricardo Filipe Sereno Póvoa

Citation names

  • Póvoa, Ricardo

Author identifiers

Ciência ID
F91C-6B03-E7C9
ORCID iD
0000-0003-2941-7494

Knowledge fields

  • Engineering and Technology - Electrotechnical Engineering, Electronics and Informatics - Electrical and Electronic Engineering

Languages

Language Speaking Reading Writing Listening Peer-review
English Advanced (C1) Advanced (C1) Advanced (C1) Advanced (C1)
Portuguese (Mother tongue)
Education
Degree Classification
2018
Concluded
 Programa Doutoral em Engenharia Electrotécnica e de Computadores (Doutoramento)
Major in Microelectrónica
Universidade de Lisboa Instituto Superior Técnico, Portugal
"A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Gain Improvement" (THESIS/DISSERTATION)
 Aprovado com Distinção e Louvor
2013/05/10
Concluded
 Mestrado Integrado em Engenharia Electrotécnica e de Computadores (Mestrado)
Major in Electrónica e Energia
Universidade de Lisboa Instituto Superior Técnico, Portugal
"Receptor de Rádio de Banda Ultra-Larga" (THESIS/DISSERTATION)
 13
Affiliation

Science

Category
Host institution 		Employer
2013/01/01 - Current Postdoc (Research) Instituto de Telecomunicações, Portugal
Projects

Grant

Designation Funders
2020/01 - 2022/12 PROMISE - PROgrammable MIxed Signal Electronics
870358
 EU/H2020
2016 - 2018 RAPID - RF IC Design Automation
UID/50008
PhD Student Fellow
Instituto de Telecomunicações, Portugal
Concluded
2016 - 2016 DISRUPTIVE - A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems
EXCL/EEI-ELC/0261/2012
PhD Student Fellow
Universidade Nova de Lisboa UNINOVA Instituto de Desenvolvimento de Novas Tecnologias, Portugal
Concluded
2014 - 2016 OPERA - Layout-Aware Analog IC Design Automation
PEst-OE/EEI/LA0008/2013
PhD Student Fellow
Instituto de Telecomunicações, Portugal
Concluded
2013 - 2013 AIDA - Automated P-Cell Generation based on Multi-Objective Optimization and Pareto Optimal Front Circuit Level Characterization
P01112
PhD Student Fellow
Instituto de Telecomunicações, Portugal
Concluded
Outputs

Publications

Book
  1. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. Tunable Low-Power Low-Noise Amplifier for Healthcare Applications. 2021.
    10.1007/978-3-030-70887-0
  2. Póvoa, Ricardo Filipe Sereno; Goes, João Carlos da Palma; Horta, Nuno Cavaco Gomes. A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain. Springer International Publishing. 2019.
    10.1007/978-3-319-95207-9
Book chapter
  1. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. "Proposed Design and Implementation". 2021.
    10.1007/978-3-030-70887-0_3
  2. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. "Layout". 2021.
    10.1007/978-3-030-70887-0_4
  3. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. "Conclusions and Future Work". 2021.
    10.1007/978-3-030-70887-0_5
  4. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. "Introduction". 2021.
    10.1007/978-3-030-70887-0_1
  5. Rafael Vieira; Nuno Horta; Nuno Lourenço; Ricardo Póvoa. "Background and State-of-the-Art". 2021.
    10.1007/978-3-030-70887-0_2
  6. Canelas, Antonio; Martins, Ricardo; Póvoa, Ricardo; Lourenco, Nuno; Guilherme, Jorge; Horta, Nuno. "Enhancing an Automatic Analog IC Design Flow by using a Technology-Independent Module Generator". In Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design. IGI Global, 2014.
    Published
  7. Póvoa, Ricardo; Lourenco, Ricardo; Lourenco, Nuno; Canelas, Antonio; Martins, Ricardo; Horta, Nuno. "Synthesis of LC-Oscillators using Rival Multi-Objective Multi-Constraint Optimization Kernels". In Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design. IGI Global, 2014.
    Published
Conference paper
  1. Lourenco, Nuno; Martins, Ricardo; Canelas, Antonio; Povoa, Ricardo; Horta, Nuno; Moutaye, Emanuel. "Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization". 2019.
    10.1109/smacd.2019.8795220
  2. Lourenco, N.; Afacan, E.; Martins, R.; Passos, F.; Canelas, A.; Povoa, R.; Horta, N.; Dundar, G.. "Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing". 2019.
    10.1109/smacd.2019.8795282
  3. Guerra, Daniel; Canelas, Antonio; Povoa, Ricardo; Horta, Nuno; Loureneo, Nuno; Martins, Ricardo. "Artificial Neural Networks as an Alternative for Automatic Analog IC Placement". 2019.
    10.1109/smacd.2019.8795267
  4. Martins, Ricardo; Loureneo, Nuno; Povoa, Ricardo; Horta, Nuno. "On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects". 2019.
    10.1109/smacd.2019.8795297
  5. Povoa, Ricardo; Canelas, Antonio; Martins, Ricardo; Horta, Nuno; Loureneo, Nuno; Goes, Joao. "A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers". 2019.
    10.1109/smacd.2019.8795248
  6. Zangpo, Jigme; Povoa, Ricardo; Guilherme, Jorge; Horta, Nuno. "An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations". 2018.
    10.1109/icecs.2018.8618027
  7. Canelas, Antonio; Povoa, Ricardo; Martins, Ricardo; Lourenco, Nuno; Guilherme, Jorge; Horta, Nuno. "A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications". 2018.
    10.1109/smacd.2018.8434917
  8. Lourenco, Nuno; Rosa, Joao; Martins, Ricardo; Aidos, Helena; Canelas, Antonio; Povoa, Ricardo; Horta, Nuno. "On the Exploration of Promising Analog IC Designs via Artificial Neural Networks". 2018.
    10.1109/smacd.2018.8434896
  9. Passos, F.; Martins, R.; Lourenco, N.; Roca, E.; Castro-Lopez, R.; Povoa, R.; Canelas, A.; Horta, N.; Fernandez, F.V.. "Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs". 2018.
    10.1109/smacd.2018.8434887
  10. Pessoa, Tiago; Lourenco, Nuno; Martins, Ricardo; Povoa, Ricardo; Horta, Nuno. "Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel". 2018.
    10.23919/date.2018.8342092
  11. Lourenco, N.; Martins, R.; Povoa, R.; Canelas, A.; Horta, N.; Passos, F.; Castro-Lopez, R.; Roca, E.; Fernandez, F. V.. "New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization". 2017.
    10.1109/smacd.2017.7981582
  12. Martins, R.; Lourenco, N.; Povoa, R.; Canelas, A.; Horta, N.; Passos, F.; Castro-Lopez, R.; Roca, E.; Fernandez, F.. "Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks". 2017.
    10.1109/smacd.2017.7981577
  13. Passos, F.; Roca, E.; Castro-Lopez, R.; Fernandez, F.V.; Martins, R.; Lourenco, N.; Povoa, R.; Canelas, A.; Horta, N.. "Systematic design of a voltage controlled oscillator using a layout-aware approach". 2017.
    10.1109/smacd.2017.7981580
  14. Povoa, R.; Canelas, A.; Martins, R.; Lourenco, N.; Horta, N.; Goes, J.. "A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits". 2017.
    10.1109/prime.2017.7974122
  15. Canelas, Antonio; Martins, Ricardo; Povoa, Ricardo; Lourenco, Nuno; Horta, Nuno. "Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing". 2017.
    10.23919/date.2017.7927171
  16. Canelas, Antonio; Martins, Ricardo; Povoa, Ricardo; Lourenco, Nuno; Horta, Nuno. "Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations". 2016.
    10.1109/smacd.2016.7520729
  17. Martins, Ricardo; Lourenco, Nuno; Canelas, Antonio; Povoa, Ricardo; Horta, Nuno. "AIDA: Robust layout-aware synthesis of analog ICs including sizing and layout generation". 2015.
    10.1109/smacd.2015.7301703
  18. Martins, Ricardo; Povoa, Ricardo; Lourenco, Nuno; Horta, Nuno. "Exploring design tradeoffs in analog IC placement with current-flow & current-density considerations". 2015.
    10.1109/smacd.2015.7301697
  19. Pandey, Mrinalinee; Canelas, Antonio; Povoa, Ricardo; Torres, Jorge; Freire, J. Costa; Lourenco, Nuno; Horta, Nuno. "Grounded active inductors design optimization for fQmax = 14.2GHz using a 130 nm CMOS technology". 2015.
    10.1109/smacd.2015.7301693
  20. Povoa, R.; Lourenco, N.; Horta, N.; Goes, J.. "A voltage-combiners-biased amplifier with enhanced gain and speed using current starving". 2015.
    10.1109/iscas.2015.7169085
  21. Povoa, R.; Lourenco, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner". 2014.
    10.1109/icecs.2014.7049972
  22. Povoa, Ricardo; Lourenco, Ricardo; Lourenco, Nuno; Canelas, Antonio; Martins, Ricardo; Horta, Nuno. "LC-VCO automatic synthesis using multi-objective evolutionary techniques". 2014.
    10.1109/iscas.2014.6865123
  23. Póvoa, Ricardo; Pinto, António; Gerald, Jose; Fernandes, Jorge. "A 7.875 GHz IR-UWB Receiver Using a Narrowband Approach". Paper presented in 28th Conference on Design of Circuits and Integrated Systems (DCIS), Donostia-San Sebastian, 2013.
  24. Povoa, R.; Lourenco, N.; Horta, N.; Santos-Tavares, R.; Goes, J.. "Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners". 2013.
    10.1109/vlsi-soc.2013.6673238
  25. Rocha, F.; Lourenco, N.; Povoa, R.; Martins, R.; Horta, N.. "A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis". 2013.
    10.1109/cec.2013.6557906
Journal article
  1. Martins, Ricardo; Lourenço, Nuno; Póvoa, Ricardo; Horta, Nuno. "Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing". Engineering Applications of Artificial Intelligence 98 (2021): 104102. http://dx.doi.org/10.1016/j.engappai.2020.104102.
    10.1016/j.engappai.2020.104102
  2. Póvoa, Ricardo; Canelas, António; Martins, Ricardo; Horta, Nuno; Lourenço, Nuno; Goes, João. "A new family of CMOS inverter-based OTAs for biomedical and healthcare applications". Integration 71 (2020): 38-48. http://dx.doi.org/10.1016/j.vlsi.2019.12.004.
    10.1016/j.vlsi.2019.12.004
  3. Povoa, Ricardo; Lourenco, Nuno; Martins, Ricardo; Canelas, Antonio; Horta, Nuno; Goes, Joao. "A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. http://dx.doi.org/10.1109/tcsii.2019.2913083.
    10.1109/tcsii.2019.2913083
  4. Ricardo Povoa; Nuno Lourenco; Ricardo Martins; Antonio Canelas; Nuno Horta; Joao Goes. "A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications". IEEE Transactions on Circuits and Systems II: Express Briefs 67 2 (2020): 230-234. https://doi.org/10.1109/TCSII.2019.2913083.
    10.1109/TCSII.2019.2913083
  5. Póvoa, Ricardo; Arya, Richa; Canelas, António; Passos, Fábio; Martins, Ricardo; Lourenço, Nuno; Horta, Nuno. "Sub-µW Tow-Thomas based biquad filter with improved gain for biomedical applications". Microelectronics Journal 95 (2020): 104675. http://dx.doi.org/10.1016/j.mejo.2019.104675.
    10.1016/j.mejo.2019.104675
  6. Antonio Canelas; Ricardo Povoa; Ricardo Martins; Nuno Lourenco; Jorge Guilherme; Joao Paulo Carvalho; Nuno Horta. "FUZYE: A Fuzzy ${c}$ -Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 1 (2020): 1-13. https://doi.org/10.1109/TCAD.2018.2883978.
    10.1109/TCAD.2018.2883978
  7. Ricardo Martins; Nuno Lourenco; Fabio Passos; Ricardo Povoa; Antonio Canelas; Elisenda Roca; Rafael Castro-Lopez; et al. "Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38 6 (2019): 989-1002. https://doi.org/10.1109/TCAD.2018.2834394.
    10.1109/TCAD.2018.2834394
  8. R. Povoa; N. Lourenco; R. Martins; A. Canelas; N. Horta; J. Goes. "Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving". IEEE Transactions on Circuits and Systems II: Express Briefs 65 11 (2018): 1599-1603. https://doi.org/10.1109/TCSII.2017.2777533.
    10.1109/TCSII.2017.2777533
  9. Passos, F.; Martins, R.; Lourenço, N.; Roca, E.; Póvoa, R.; Canelas, A.; Castro-López, R.; Horta, N.; Fernández, F.V.. "Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology". Integration 63 (2018): 351-361. http://dx.doi.org/10.1016/j.vlsi.2018.02.005.
    10.1016/j.vlsi.2018.02.005
  10. Calvillo, Jonathan P.; Póvoa, Ricardo; Guilherme, Jorge; Horta, Nuno. "Second-order compensation BGR with low TC and high performance for space applications". Integration 63 (2018): 256-265. http://dx.doi.org/10.1016/j.vlsi.2018.07.001.
    10.1016/j.vlsi.2018.07.001
  11. Ricardo Povoa; Nuno Lourenco; Ricardo Martins; Antonio Canelas; Nuno Cavaco Gomes Horta; Joao Goes. "Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement". IEEE Transactions on Circuits and Systems II: Express Briefs 65 3 (2018): 266-270. https://doi.org/10.1109/TCSII.2017.2686586.
    10.1109/TCSII.2017.2686586
  12. Martins, Ricardo; Póvoa, Ricardo; Lourenço, Nuno; Horta, Nuno. "Current-flow and current-density-aware multi-objective optimization of analog IC placement". Integration 55 (2016): 295-306. http://dx.doi.org/10.1016/j.vlsi.2016.05.008.
    10.1016/j.vlsi.2016.05.008
  13. Pandey, Mrinalinee; Canelas, António; Póvoa, Ricardo; Torres, Jorge Alves; Costa Freire, J.; Lourenço, Nuno; Horta, Nuno. "Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer". Integration 55 (2016): 330-340. http://dx.doi.org/10.1016/j.vlsi.2016.06.007.
    10.1016/j.vlsi.2016.06.007
  14. Lourenço, Nuno; Martins, Ricardo; Canelas, António; Póvoa, Ricardo; Horta, Nuno. "AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation". Integration 55 (2016): 316-329. http://dx.doi.org/10.1016/j.vlsi.2016.04.009.
    10.1016/j.vlsi.2016.04.009
  15. Póvoa, R.; Bastos, I.; Lourenço, N.; Horta, N.. "Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques". Integration 52 (2016): 243-252. http://dx.doi.org/10.1016/j.vlsi.2015.04.005.
    10.1016/j.vlsi.2015.04.005
  16. Lourenço, Nuno; Canelas, António; Póvoa, Ricardo; Martins, Ricardo; Horta, Nuno. "Floorplan-aware analog IC sizing and optimization based on topological constraints". Integration 48 (2015): 183-197. http://dx.doi.org/10.1016/j.vlsi.2014.07.002.
    10.1016/j.vlsi.2014.07.002
Activities

Oral presentation

Presentation title Event name
Host (Event location)
2019 A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
(Lausanne, Switzerland)
2017 Dynamic Voltage-Combiners Biased OTA for Low-Power High-Speed SC Circuits 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
(Taormina, Italy)
2015 A Voltage-Combiners-Biased Amplifier with Enhanced Gain and Speed using Current Starving 2015 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE (Lisboa, Portugal)
2014 A Cascode-Free Single-Stage Amplifier using a Fully-Differential Folded Voltage-Combiner 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
IEEE (Marseille, France)
2014 LC-VCO Automatic Synthesis Using Multi-Objective Evolutionary Techniques 2014 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE (Melbourne, Australia)
2013 Single-Stage Amplifiers with Gain Enhancement and Improved Energy-Efficiency employing Voltage-Combiners 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)
IEEE (Istanbul, Turkey)

Supervision

Thesis Title
Role 		Degree Subject (Type)
Institution / Organization
2019 - Current BIOCAS: Design of Low-power Sensors for Wearable Biometric and Medical Application
Co-supervisor
 Mestrado Integrado em Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019 - Current BIOCAS: Design of a Low Noise Amplifier for Neural Recording Implants
Co-supervisor
 Mestrado Integrado em Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal
2019 - Current CAD: AIDA-TOP - Analog IC Topology Selection
Co-supervisor
 Mestrado Integrado em Engenharia Electrotécnica e de Computadores (Master)
Universidade de Lisboa Instituto Superior Técnico, Portugal

Event organisation

Event name
Type of event (Role) 		Institution / Organization
2016 - 2016 IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisbon, Portugal, June 2016. Conferência científica com arbitragem e participação internacional nas áreas de circuitos e sistemas, modelação e automação. (2016 - 2016)
Conference (Member of the Organising Committee)
 IEEE Circuits and Systems Society, United States
2016 - 2016 IEEE Conference on PhD Research in Microelectronics and Electronics (PRIME), Lisbon, Portugal, June 2016. Conferência científica com arbitragem e participação internacional nas áreas de electrónica geral e microelectrónica. (2016 - 2016) IEEE Circuits and Systems Society, United States
2015 - 2015 IEEE International Symposium on Circuits And Systems (ISCAS), Lisboa, Portugal, May 2015. Conferência científica com arbitragem e participação internacional na área de circuitos e sistemas. (2015 - 2015)
Conference (Member of the Organising Committee)
 IEEE Circuits and Systems Society, United States
2014 - 2014 Workshop on Advances in Analog Circuit Design. Encontro científico, com participação internacional. (2014 - 2014)
Meeting (Co-organisor)
 Instituto de Telecomunicações, Portugal

Event participation

Activity description
Type of event 		Event name
Institution / Organization
2017 - 2017 Poster
Meeting
 Industry Day Printed Electronics and Solar Cells
Instituto de Telecomunicações, Portugal
2015 - 2015 Best Student Paper Award Contest
Call
 IEEE International Symposium on Circuits and Systems
2014 - 2014 Best Student Paper Award Contest
Call
 IEEE International Symposium on Circuits and Systems
2013 - 2013 Poster
Meeting
 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)
IEEE Circuits and Systems Society, United States

Conference scientific committee

Conference name Conference host
2018 - 2018 2018 33rd Conference on Design of Circuits and Integrated Systems (DCIS) Lyon, France
2017 - 2017 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) Taormina, Italy
2017 - 2017 2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Taormina, Italy
2016 - 2016 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) Lisbon, Portugal
2016 - 2016 2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Lisbon, Portugal
2015 - 2015 2015 IEEE International Symposium on Circuits and Systems (ISCAS) Lisbon, Portugal
2015 - 2015 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS) Montevideo, Uruguay
2014 - 2014 2014 IEEE International Symposium on Circuits and Systems (ISCAS) Melbourne, Australia

Journal scientific committee

Journal title (ISSN) Publisher
2019 - 2019 Integration, The VLSI Journal Elsevier
2019 - 2019 AEU - International Journal of Electronics and Communications (1434-8411) Elsevier
2019 - 2019 IEEE Transactions on Circuits and Systems - II: Express Briefs IEEE
2018 - 2018 Integration, The VLSI Journal Elsevier
2018 - 2018 IEEE Transactions on Circuits and Systems - II: Express Briefs IEEE
2018 - 2018 AEU - International Journal of Electronics and Communications (1434-8411) Elsevier
2018 - 2018 Microelectronics Journal Elsevier
2017 - 2017 IEEE Transactions on Circuits and Systems - II: Express Briefs IEEE
2017 - 2017 AEU - International Journal of Electronics and Communications (1434-8411) Elsevier
2017 - 2017 Integration, The VLSI Journal Elsevier
2014 - 2014 Microelectronics Journal (0026-2692) Elsevier
Distinctions

Award

2019 Best Paper Award Finalist
IEEE Circuits and Systems Society, United States
2018 Best Paper Award Winner
IEEE Circuits and Systems Society, United States
2015 Best Student Paper Award Nominated
IEEE Circuits and Systems Society, United States
2014 Best Student Paper Award Runner-up
IEEE Circuits and Systems Society, United States
2012 Challenge Deloitte IT Business Certificate of Achievement
Deloitte Portugal, Portugal