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Jatin Arora is an Embedded Systems Research Scientist at VORTEX CoLab, where he is involved in cutting-edge research on the safety of cyber-physical systems. He is also associated with CISTER (Research Centre in Real-Time & Embedded Computing Systems) as a PhD researcher. He completed his PhD in Electrical and Computer Engineering at the Faculty of Engineering, University of Porto, in 2023. His dissertation focused on the schedulability analysis of real-time tasks executing on COTS multicore systems. Specifically, he developed novel solutions to accurately quantify inter-task contention caused by shared main memory and memory buses in multicore platforms. His PhD research was partially funded by FCT through the individual PhD grant 2020.09532.BD. Prior to that, he received an M.Tech in Embedded Systems and a B.Tech in Electronics & Communication Engineering from India in 2017 and 2014, respectively. He has co-authored several publications in reputable real-time systems conferences, such as IEEE RTSS, IEEE RTCSA, RTNS, ICESS, and journals like Elsevier's Journal of Systems Architecture. He has also participated in national and international research projects. Among his awards and honors, he received the "Best Paper Award" at the ICESS 2021 conference, the "Best Paper Candidate" at IEEE RTCSA 2024, and won the "PhD Forum Prize" at the DATE 2023 conference. He actively contributes to the real-time embedded systems research community by serving on the Technical Program Committees of DATE’25, EMSICC’25, and ECRTS’24 (Artifact Evaluation), as well as the local organizing committee of RTNS’24. His research interests include real-time embedded systems, timing and scheduling analysis, resource contention, and predictability in multicore architectures. He is currently co-supervising a PhD student enrolled in the Electrical and Computer Engineering program at the University of Porto.
Identificação

Identificação pessoal

Nome completo
Jatin Arora

Nomes de citação

  • Arora, Jatin

Identificadores de autor

Ciência ID
8816-61C3-8763
ORCID iD
0000-0001-6198-6852

Endereços de correio eletrónico

  • jatin@isep.ipp.pt (Profissional)
  • jatin.arora@vortex-colab.com (Profissional)

Telefones

Telemóvel
  • 920055318 (Pessoal)

Websites

Domínios de atuação

  • Ciências da Engenharia e Tecnologias - Engenharia Eletrotécnica, Eletrónica e Informática - Engenharia Eletrotécnica e Eletrónica

Idiomas

Idioma Conversação Leitura Escrita Compreensão Peer-review
Inglês Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2) Utilizador proficiente (C2)
Português Utilizador elementar (A2) Utilizador elementar (A2) Utilizador elementar (A2) Utilizador elementar (A2)
Hindi (Idioma materno)
Punjabi (Idioma materno)
Formação
Grau Classificação
2018/09/25 - 2023/09/08
Concluído
Doctoral Program in Electrical and Computer Engineering (Doutoramento)
Universidade do Porto, Portugal
"Shared Resource Contention-aware Schedulability Analysis of Hard Real-Time Systems" (TESE/DISSERTAÇÃO)
17.13/20
2015/11/01 - 2017/12/31
Concluído
Embedded Systems (Master)
Sree Dattha Institutions, Índia
"Wearable Sensor based Remote Patient Monitoring using Internet of Things and Data Analytics" (TESE/DISSERTAÇÃO)
8.14/10
2011/08/01 - 2014/04/30
Concluído
Electronics and Communication Engineering (Bachelor)
CT Institute of Engineering Management and Technology, Índia
"Heartbeat rate monitoring system by pulse technique using HB sensor" (TESE/DISSERTAÇÃO)
77.45% out of 100%
Percurso profissional

Ciência

Categoria Profissional
Instituição de acolhimento
Empregador
2023/09/11 - Atual Investigador (Investigação) CoLAB VORTEX, Portugal
2023/09/11 - Atual Investigador (Investigação) Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal
Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal
2018/09/25 - 2023/08/31 Investigador (Investigação) Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal
2018/01/02 - 2018/06/30 Assistente de Investigação (carreira) (Investigação) Guru Nanak Institutions, Índia

Outros

Categoria Profissional
Instituição de acolhimento
Empregador
2014/06/01 - 2015/10/31 Project Engineer Punjab Micro Circuits Research Labs Pvt. Ltd., Índia
Punjab Micro Circuits Research Labs Pvt. Ltd., Índia
Projetos

Bolsa

Designação Financiadores
2023/09/11 - Atual ROUTE25
Bolseiro de Investigação
Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal

CoLAB VORTEX, Portugal
European Union
Em curso

Projeto

Designação Financiadores
2018/09/25 - 2022/01/30 PReFECT- Predictable Multiprocessor Platforms for Embedded Safety Critical Systems
Bolseiro de Investigação
Instituto Politécnico do Porto Centro de Investigação em Sistemas Computacionais Embebidos e de Tempo-Real, Portugal
Associação para a Inovação e Desenvolvimento da FCT
Concluído
Produções

Publicações

Artigo em conferência
  1. Arora, Jatin; Rashid, Syed Aftab; Nelissen, Geoffrey; Maia, Claudio; Tovar, Eduardo. "Improved Memory Contention Analysis for the 3-Phase Task Model". Trabalho apresentado em IEEE 30th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Sokcho, 2024.
    Publicado • 10.1109/rtcsa62462.2024.00012
  2. Alexandre Esper; Arora, Jatin; Nelissen, Geoffrey; Tovar, Eduardo. Autor correspondente: Alexandre Esper. "A Novel Heuristic Framework for Offline IMA Schedule Generation for Multicore Platforms". Trabalho apresentado em 12th European Congress on Embedded Real Time Systems (ERTS), Toulouse, 2024.
    Publicado
  3. Arora, Jatin; Rashid, Syed Aftab; Nelissen, Geoffrey; Maia, Cláudio; Tovar, Eduardo. "Improved Bus Contention Analysis for 3-Phase Tasks". Trabalho apresentado em IEEE 29th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Niigata, 2023.
    Publicado • 10.1109/rtcsa58653.2023.00036
  4. Arora, Jatin; Rashid, Syed Aftab; Maia, Claudio; Nelissen, Geoffrey; Tovar, Eduardo. "Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems". Trabalho apresentado em IEEE Real-Time Systems Symposium (RTSS) 2023, Houston, 2022.
    Publicado • 10.1109/rtss55097.2022.00054
  5. Arora, Jatin; Rashid, Syed Aftab; Maia, Claudio; Tovar, Eduardo. "Analyzing Fixed Task Priority Based Memory Centric Scheduler for the 3-Phase Task Model". Trabalho apresentado em IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Taipei, 2022.
    Publicado • 10.1109/rtcsa55878.2022.00012
  6. Arora, Jatin; Maia, Cláudio; Aftab Rashid, Syed; Nelissen, Geoffrey; Tovar, Eduardo. "Bus-Contention Aware Schedulability Analysis for the 3-Phase Task Model with Partitioned Scheduling". Trabalho apresentado em 29th International Conference on Real-Time Networks and Systems (RTNS 2021), 2021.
    Publicado • 10.1145/3453417.3453433
  7. Arora, Jatin; Maia, Claudio; Rashid, Syed Aftab; Nelissen, Geoffrey; Tovar, Eduardo. "Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling". Trabalho apresentado em 2020 IEEE Real-Time Systems Symposium (RTSS), 2020.
    Publicado • 10.1109/rtss49844.2020.00050
  8. Gagandeep; Arora, Jatin; Kumar, Ravinder. "Biometric Finger Print Attendance System: An Internet-of-Things Application". Trabalho apresentado em 5th International Conference on Innovations in Computer Science and Engineering, 2017 (ICICSE 2017), 2017.
    Publicado
  9. Arora, Jatin; Gagandeep; Kumar, Ravinder. "IoT-Based Smart Home Systems". Trabalho apresentado em 5th International Conference on Innovations in Computer Science and Engineering, 2017, 2017.
    Publicado
  10. Arora, Jatin; Gagandeep; Rawat, Sarvesh S S; Srinivasan, Karthik; Puri, Vikram. "Design and development of digital voltmeter using different techniques". 2014.
    Publicado • 10.1109/icgccee.2014.6922298
  11. Arora, Jatin; Gagandeep; Singh, Amandeep; Singh, Narinder Pal; Rawat, Sarvesh S S; Singh, Gurvinder. "Heartbeat rate monitoring system by pulse technique using HB sensor". 2014.
    Publicado • 10.1109/icices.2014.7033986
  12. Rawat, Sarvesh S S; Roy, Sanjiban Sekhar; Arora, Jatin; Suman Shashank, G.. "Multicriteria decision examination in wireless sensor networks". Trabalho apresentado em ICROIT 2014, 2014.
    Publicado • 10.1109/icroit.2014.6798320
Artigo em revista
  1. Arora, Jatin; Maia, Cláudio; Rashid, Syed Aftab; Nelissen, Geoffrey; Tovar, Eduardo. "Schedulability analysis for 3-phase tasks with partitioned fixed-priority scheduling". Journal of Systems Architecture 131 (2022): 102706. http://dx.doi.org/10.1016/j.sysarc.2022.102706.
    Publicado • 10.1016/j.sysarc.2022.102706
  2. Arora, Jatin; Maia, Cláudio; Rashid, Syed Aftab; Nelissen, Geoffrey; Tovar, Eduardo. "Bus-contention aware WCRT analysis for the 3-phase task model considering a work-conserving bus arbitration scheme". Journal of Systems Architecture 122 (2022): 102345. http://dx.doi.org/10.1016/j.sysarc.2021.102345.
    Publicado • 10.1016/j.sysarc.2021.102345
  3. Arora, Jatin; Yomsi, Patrick Meumeu. "Wearable Sensors Based Remote Patient Monitoring using IoT and Data Analytics". U.Porto Journal of Engineering 5 1 (2019): 34-45. http://dx.doi.org/10.24840/2183-6493_005.001_0003.
    Acesso aberto • Publicado • 10.24840/2183-6493_005.001_0003
  4. Arora, Jatin; ., Gagandeep; J. Sugumar, S; Kumar, Ravinder. "Smart Goods Billing Management and Payment System for Shopping Malls". International Journal of Engineering & Technology 7 2.7 (2018): 456-461. http://dx.doi.org/10.14419/ijet.v7i2.7.10862.
    Acesso aberto • Publicado • 10.14419/ijet.v7i2.7.10862
Resumo em conferência
  1. Arora, Jatin; Aftab Rashid, Syed; Geoffrey Nelissen; Cláudio Maia; Eduardo Tovar. "Memory Contention Analysis for 3-Phase Tasks". Trabalho apresentado em Junior Researcher Workshop on Real-Time Computing, co-located with RTNS 2023 (JRWRTC 2023), Dortmund, 2023.
    Publicado
  2. Arora, Jatin; Eduardo Tovar; Cláudio Maia. "Shared Resource Contention Aware Schedulability Analysis for Multiprocessor Real-Time Systems". Trabalho apresentado em DATE, Antwerp, 2023.
    Publicado
  3. Arora, Jatin; Maia, Cláudio; Rashid, Syed Aftab; Tovar, Eduardo. "Open Issues in Analyzing the Schedulability for the 3-Phase Task Model using Partitioned Scheduling". Trabalho apresentado em Doctoral Congress in Engineering (DCE) 2021, 2021.
    Publicado
Tese / Dissertação
  1. "Shared Resource Contention-Aware Schedulability Analysis of Hard Real-Time Systems". Doutoramento, Universidade do Porto Faculdade de Engenharia, 2023. https://repositorio-aberto.up.pt/handle/10216/153120.
Atividades

Apresentação oral de trabalho

Título da apresentação Nome do evento
Anfitrião (Local do evento)
2024/08/21 Improved Memory Contention Analysis for the 3-Phase Task Model IEEE 30th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)
IEEE (Sokcho, Coreia do Sul)
2023/08/31 Improved Bus Contention Analysis for 3-Phase Tasks IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), 2023
(Niigata, Japão)
2023/06/07 Memory Contention Analysis for 3-Phase Tasks Junior Researcher Workshop on Real-Time Computing (JRWRTC), co-located with RTNS 2023
(Dortmund, Alemanha)
2022/12/05 Work-in-Progress: A Holistic Approach to WCRT Analysis forMulticore Systems 2022 IEEE Real-Time Systems Symposium (RTSS)
(Houston, Estados Unidos)
2022/08/23 Analyzing FixedTask Priority Based Memory Centric Scheduler for the 3-Phase Task Model IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), 2022
(Taipei, Taiwan)
2021/12/14 Bus-Contention Aware WCRT Analysis for the 3-Phase Task Model Considering a Work-Conserving Bus Arbitration Scheme International Conference on Embedded Software and Systems (ICESS 2021)
2021/06/04 Open Questions for the Bus-Blocking Problem in the 3-Phase Task Model under Partitioned Scheduling sCalable And PrecIse Timing AnaLysis for multicore platforms (CAPITAL) workshop, 2021
(França)
2021/04/08 Bus-Contention Aware Schedulability Analysis for the 3-Phase Task Model with Partitioned Scheduling The 29th International Conference on Real-Time Networks and Systems (RTNS 2021)
(Nantes, França)
2020/12/02 Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling 41st IEEE Real-Time Systems Symposium (RTSS 2020)
(Estados Unidos)

Orientação

Título / Tema
Papel desempenhado
Curso (Tipo)
Instituição / Organização
2023/10/01 - Atual Offline IMA Schedule Generation with Contention-Free Shared I/O Assesses
Coorientador
Doctoral Program in Electrical and Computer Engineering (Doutoramento)
Universidade do Porto Faculdade de Engenharia, Portugal

Organização de evento

Nome do evento
Tipo de evento (Tipo de participação)
Instituição / Organização
2024/09/01 - 2024/11/08 Local Organizing Committee Member of 32nd International Conference on Real-Time Networks and Systems (RTNS) (2024/11/06 - 2024/11/08)
Conferência (Membro da Comissão Organizadora)
32nd International Conference on Real-Time Networks and Systems (RTNS 2024), Portugal

Comissão de avaliação

Descrição da atividade
Tipo de assessoria
Instituição / Organização Entidade financiadora
2024/07/09 - 2024/07/12 Committee member of Artifact Evaluation of ECRTS, 2024
Membro
ECRTS 2024, França

Membro de comissão

Descrição da atividade
Tipo de participação
Instituição / Organização
2025/08/11 - 2025/08/13 Technical Program Committee member of the 10th International Workshop on Energy Management for Sustainable Internet-of-Things and Cloud Computing (EMSICC)
Membro
10th International Workshop on Energy Management for Sustainable Internet-of-Things and Cloud Computing (EMSICC), Turquia
2025/03/31 - 2025/04/02 Technical Program Committee member of Design, Automation and Test in Europe Conference (DATE) 2025 conference, Track-E2: Real-time, dependable and privacy-enhanced systems.
Membro
Design, Automation and Test in Europe Conference (DATE) 2025, França
2021/06/28 - 2021/06/29 Technical Program Committee member of Symposium on Electrical and Computer Engineering in DCE 2021
Membro
Universidade do Porto Faculdade de Engenharia, Portugal

Revisão ad hoc de artigos em revista

Nome da revista (ISSN) Editora
2025/02/20 - Atual Journal of System Architecture Elsevier
2024/02/09 - 2024/05/16 IEEE Transactions on Circuits and Systems I: Regular Papers IEEE
2023/03/05 - 2023/07/28 Journal of Systems Architecture Elsevier

Tutoria

Tópico Nome do aluno
2018/01/18 - 2018/04/20 Heart Rate measurement with Photoplethysmography (PPG) and Alert System using IoT THAKUR, ABHIJEET SINGH; CHITRAMEGHANA, VIRIGINENI ; RASHMIKA, THUMMENAPALLY
2018/01/02 - 2018/04/01 Internet of Things based smart farming systems MARREDDY, THUMMA ; LAVANYA, BURRA ; HEMANTH KUMAR, BODAKUNTLA
Distinções

Prémio

2024 Best Paper Candidate (given to top three papers of the conference)
30th IEEE International Conference on Embedded and Real-Time Computing Systems and Application (RTCSA), 2024, Coreia do Sul
2023 PhD Forum Best Poster Prize
Design, Automation and Test in Europe Conference (DATE) 2023, Bélgica
2023 PhD Forum Travel Grant and Registration Sponsorship
Design, Automation and Test in Europe Conference (DATE) 2023, Bélgica
2022 Student Travel Grant
IEEE Real Time Systems Symposium (RTSS) 2022, Estados Unidos
2021 Best Paper Award
International Conference on Embedded Software and Systems (ICESS) 2021, China
2020 Individual PhD Research Grant
Fundação para a Ciência e a Tecnologia, Portugal
2013 Best Presenter
CT Institute of Engineering Management and Technology, Índia

Outra distinção

2017 Academic Performance
Sree Dattha Institutions, Índia